codegen_opcodes/
codegen_opcodes.rs

1use c64_assembler_6502::{
2    isa_6502,
3    opcodes::{OpCode, NO_IMPLIED},
4};
5
6fn main() {
7    fn format_opcode(result: &mut Vec<String>, instruction: &str, opcode: OpCode, post: &str) {
8        if opcode != NO_IMPLIED {
9            result.push(format!(
10                "/// OpCode for the {} instruction in addressing mode {}
11pub const {}_{}:OpCode = 0x{:02x};",
12                instruction,
13                post.to_lowercase(),
14                instruction.to_string().to_uppercase(),
15                post,
16                opcode
17            ));
18        }
19    }
20
21    let mut lines = Vec::<String>::default();
22    for def in isa_6502() {
23        format_opcode(&mut lines, def.instruction, def.implied, "IMPLIED");
24        format_opcode(&mut lines, def.instruction, def.immediate, "IMMEDIATE");
25        format_opcode(&mut lines, def.instruction, def.accumulator, "ACCUMULATOR");
26        format_opcode(&mut lines, def.instruction, def.absolute, "ABSOLUTE");
27        format_opcode(&mut lines, def.instruction, def.absolute_x, "ABSOLUTE_X");
28        format_opcode(&mut lines, def.instruction, def.absolute_y, "ABSOLUTE_Y");
29        format_opcode(&mut lines, def.instruction, def.zeropage, "ZEROPAGE");
30        format_opcode(&mut lines, def.instruction, def.zeropage_x, "ZEROPAGE_X");
31        format_opcode(&mut lines, def.instruction, def.zeropage_y, "ZEROPAGE_Y");
32        format_opcode(&mut lines, def.instruction, def.relative, "RELATIVE");
33        format_opcode(&mut lines, def.instruction, def.indirect, "INDIRECT");
34        format_opcode(&mut lines, def.instruction, def.indexed_indirect, "INDEXED_INDIRECT");
35        format_opcode(&mut lines, def.instruction, def.indirect_indexed, "INDIRECT_INDEXED");
36    }
37
38    println!("{}", lines.join("\n"));
39}
codegen_opcodes/codegen_opcodes.rs

codegen_opcodes/
codegen_opcodes.rs
