use embedded_hal_async::{delay::DelayNs, i2c::I2c};
use crate::{
Bmp5xx,
error::{
Error::{OdrInvalid, ReadError, WriteError},
Result,
},
register::{ODR_CONFIG, OSR_EFF},
};
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
#[repr(u8)]
pub enum OutputDataRate {
Hz240 = 0x00,
Hz218 = 0x01,
Hz199 = 0x02,
Hz179 = 0x03,
Hz160 = 0x04,
Hz149 = 0x05,
Hz140 = 0x06,
Hz129 = 0x07,
Hz120 = 0x08,
Hz110 = 0x09,
Hz100 = 0x0A,
Hz089 = 0x0B,
Hz080 = 0x0C,
Hz070 = 0x0D,
Hz060 = 0x0E,
Hz050 = 0x0F,
Hz045 = 0x10,
Hz040 = 0x11,
Hz035 = 0x12,
Hz030 = 0x13,
Hz025 = 0x14,
Hz020 = 0x15,
Hz015 = 0x16,
Hz010 = 0x17,
Hz005 = 0x18,
Hz004 = 0x19,
Hz003 = 0x1A,
Hz002 = 0x1B,
Hz001 = 0x1C,
Hz000_5 = 0x1D,
Hz000_25 = 0x1E,
Hz000_125 = 0x1F,
}
impl<I2C, D> Bmp5xx<I2C, D>
where
I2C: I2c,
D: DelayNs,
{
pub async fn start_normal(&mut self, press_en: bool, odr: OutputDataRate) -> Result<()> {
self.stop().await?;
self.conf_osr(press_en).await?;
self.i2c
.write(self.addr, &[ODR_CONFIG, (odr as u8) << 2 | 0x01])
.await
.map_err(|_| WriteError)?;
let mut osr_eff_buf = [0u8; 1];
self.i2c
.write_read(self.addr, &[OSR_EFF], &mut osr_eff_buf)
.await
.map_err(|_| ReadError)?;
if osr_eff_buf[0] & 0x80 == 0 {
return Err(OdrInvalid);
}
Ok(())
}
}