#ifndef BLIS_KERNEL_MACRO_DEFS_H
#define BLIS_KERNEL_MACRO_DEFS_H
#ifndef BLIS_THREAD_RATIO_M
#define BLIS_THREAD_RATIO_M 1
#endif
#ifndef BLIS_THREAD_RATIO_N
#define BLIS_THREAD_RATIO_N 1
#endif
#ifndef BLIS_THREAD_MAX_IR
#define BLIS_THREAD_MAX_IR 1
#endif
#ifndef BLIS_THREAD_MAX_JR
#define BLIS_THREAD_MAX_JR 4
#endif
#if 0#endif
#ifdef BLIS_DISABLE_MEMKIND
#undef BLIS_ENABLE_MEMKIND
#endif
#ifdef BLIS_ENABLE_MEMKIND
#include <hbwmalloc.h>
#endif
#ifndef BLIS_MALLOC_POOL
#ifdef BLIS_ENABLE_MEMKIND
#define BLIS_MALLOC_POOL hbw_malloc
#else
#define BLIS_MALLOC_POOL malloc
#endif
#endif
#ifndef BLIS_FREE_POOL
#ifdef BLIS_ENABLE_MEMKIND
#define BLIS_FREE_POOL hbw_free
#else
#define BLIS_FREE_POOL free
#endif
#endif
#ifndef BLIS_MALLOC_INTL
#define BLIS_MALLOC_INTL malloc
#endif
#ifndef BLIS_FREE_INTL
#define BLIS_FREE_INTL free
#endif
#ifndef BLIS_MALLOC_USER
#define BLIS_MALLOC_USER malloc
#endif
#ifndef BLIS_FREE_USER
#define BLIS_FREE_USER free
#endif
#ifndef BLIS_PAGE_SIZE
#define BLIS_PAGE_SIZE 4096
#endif
#ifndef BLIS_SIMD_MAX_NUM_REGISTERS
#define BLIS_SIMD_MAX_NUM_REGISTERS 32
#endif
#ifndef BLIS_SIMD_MAX_SIZE
#define BLIS_SIMD_MAX_SIZE 64
#endif
#ifndef BLIS_SIMD_ALIGN_SIZE
#define BLIS_SIMD_ALIGN_SIZE BLIS_SIMD_MAX_SIZE
#endif
#ifndef BLIS_STACK_BUF_MAX_SIZE
#define BLIS_STACK_BUF_MAX_SIZE ( BLIS_SIMD_MAX_NUM_REGISTERS * \
BLIS_SIMD_MAX_SIZE * 2 )
#endif
#ifndef BLIS_STACK_BUF_ALIGN_SIZE
#define BLIS_STACK_BUF_ALIGN_SIZE BLIS_SIMD_ALIGN_SIZE
#endif
#ifndef BLIS_HEAP_ADDR_ALIGN_SIZE
#define BLIS_HEAP_ADDR_ALIGN_SIZE BLIS_SIMD_ALIGN_SIZE
#endif
#ifndef BLIS_HEAP_STRIDE_ALIGN_SIZE
#define BLIS_HEAP_STRIDE_ALIGN_SIZE BLIS_SIMD_ALIGN_SIZE
#endif
#ifndef BLIS_POOL_ADDR_ALIGN_SIZE_A
#define BLIS_POOL_ADDR_ALIGN_SIZE_A BLIS_PAGE_SIZE
#endif
#ifndef BLIS_POOL_ADDR_ALIGN_SIZE_B
#define BLIS_POOL_ADDR_ALIGN_SIZE_B BLIS_PAGE_SIZE
#endif
#ifndef BLIS_POOL_ADDR_ALIGN_SIZE_C
#define BLIS_POOL_ADDR_ALIGN_SIZE_C BLIS_PAGE_SIZE
#endif
#ifndef BLIS_POOL_ADDR_ALIGN_SIZE_GEN
#define BLIS_POOL_ADDR_ALIGN_SIZE_GEN BLIS_PAGE_SIZE
#endif
#ifndef BLIS_POOL_ADDR_OFFSET_SIZE_A
#define BLIS_POOL_ADDR_OFFSET_SIZE_A 0
#endif
#ifndef BLIS_POOL_ADDR_OFFSET_SIZE_B
#define BLIS_POOL_ADDR_OFFSET_SIZE_B 0
#endif
#ifndef BLIS_POOL_ADDR_OFFSET_SIZE_C
#define BLIS_POOL_ADDR_OFFSET_SIZE_C 0
#endif
#ifndef BLIS_POOL_ADDR_OFFSET_SIZE_GEN
#define BLIS_POOL_ADDR_OFFSET_SIZE_GEN 0
#endif
#ifdef BLIS_IN_REF_KERNEL
#ifndef BLIS_MR_s
#define BLIS_MR_s 4
#endif
#ifndef BLIS_MR_d
#define BLIS_MR_d 4
#endif
#ifndef BLIS_MR_c
#define BLIS_MR_c 4
#endif
#ifndef BLIS_MR_z
#define BLIS_MR_z 4
#endif
#ifndef BLIS_NR_s
#define BLIS_NR_s 16
#endif
#ifndef BLIS_NR_d
#define BLIS_NR_d 8
#endif
#ifndef BLIS_NR_c
#define BLIS_NR_c 8
#endif
#ifndef BLIS_NR_z
#define BLIS_NR_z 4
#endif
#ifndef BLIS_BBM_s
#define BLIS_BBM_s 1
#endif
#ifndef BLIS_BBM_d
#define BLIS_BBM_d 1
#endif
#ifndef BLIS_BBM_c
#define BLIS_BBM_c 1
#endif
#ifndef BLIS_BBM_z
#define BLIS_BBM_z 1
#endif
#ifndef BLIS_BBN_s
#define BLIS_BBN_s 1
#endif
#ifndef BLIS_BBN_d
#define BLIS_BBN_d 1
#endif
#ifndef BLIS_BBN_c
#define BLIS_BBN_c 1
#endif
#ifndef BLIS_BBN_z
#define BLIS_BBN_z 1
#endif
#ifndef BLIS_PACKMR_s
#define BLIS_PACKMR_s (BLIS_MR_s*BLIS_BBM_s)
#endif
#ifndef BLIS_PACKMR_d
#define BLIS_PACKMR_d (BLIS_MR_d*BLIS_BBM_d)
#endif
#ifndef BLIS_PACKMR_c
#define BLIS_PACKMR_c (BLIS_MR_c*BLIS_BBM_c)
#endif
#ifndef BLIS_PACKMR_z
#define BLIS_PACKMR_z (BLIS_MR_z*BLIS_BBM_z)
#endif
#ifndef BLIS_PACKNR_s
#define BLIS_PACKNR_s (BLIS_NR_s*BLIS_BBN_s)
#endif
#ifndef BLIS_PACKNR_d
#define BLIS_PACKNR_d (BLIS_NR_d*BLIS_BBN_d)
#endif
#ifndef BLIS_PACKNR_c
#define BLIS_PACKNR_c (BLIS_NR_c*BLIS_BBN_c)
#endif
#ifndef BLIS_PACKNR_z
#define BLIS_PACKNR_z (BLIS_NR_z*BLIS_BBN_z)
#endif
#endif
#endif