#include <stdatomic.h>
#include "general.h"
#include "platform.h"
#include "usb.h"
#include "traceswo.h"
#include <libopencmsis/core_cm3.h>
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/usart.h>
#include <libopencm3/stm32/dma.h>
static volatile uint32_t write_index;
static volatile uint32_t read_index;
static uint8_t trace_rx_buf[NUM_TRACE_PACKETS * TRACE_ENDPOINT_SIZE];
static uint8_t pingpong_buf[2 * TRACE_ENDPOINT_SIZE];
static bool decoding = false;
void trace_buf_drain(usbd_device *dev, uint8_t ep)
{
static atomic_flag reentry_flag = ATOMIC_FLAG_INIT;
if (atomic_flag_test_and_set_explicit(&reentry_flag, memory_order_relaxed))
return;
if (write_index != read_index) {
uint16_t result;
if (decoding)
result = traceswo_decode(
dev, CDCACM_UART_ENDPOINT, &trace_rx_buf[read_index * TRACE_ENDPOINT_SIZE], TRACE_ENDPOINT_SIZE);
else
result =
usbd_ep_write_packet(dev, ep, &trace_rx_buf[read_index * TRACE_ENDPOINT_SIZE], TRACE_ENDPOINT_SIZE);
if (result)
read_index = (read_index + 1U) % NUM_TRACE_PACKETS;
}
atomic_flag_clear_explicit(&reentry_flag, memory_order_relaxed);
}
void traceswo_setspeed(uint32_t baudrate)
{
dma_disable_channel(SWO_DMA_BUS, SWO_DMA_CHAN);
usart_disable(SWO_UART);
usart_set_baudrate(SWO_UART, baudrate);
usart_set_databits(SWO_UART, 8);
usart_set_stopbits(SWO_UART, USART_STOPBITS_1);
usart_set_mode(SWO_UART, USART_MODE_RX);
usart_set_parity(SWO_UART, USART_PARITY_NONE);
usart_set_flow_control(SWO_UART, USART_FLOWCONTROL_NONE);
dma_channel_reset(SWO_DMA_BUS, SWO_DMA_CHAN);
dma_set_peripheral_address(SWO_DMA_BUS, SWO_DMA_CHAN, (uint32_t)&SWO_UART_DR);
dma_set_read_from_peripheral(SWO_DMA_BUS, SWO_DMA_CHAN);
dma_enable_memory_increment_mode(SWO_DMA_BUS, SWO_DMA_CHAN);
dma_set_peripheral_size(SWO_DMA_BUS, SWO_DMA_CHAN, DMA_CCR_PSIZE_8BIT);
dma_set_memory_size(SWO_DMA_BUS, SWO_DMA_CHAN, DMA_CCR_MSIZE_8BIT);
dma_set_priority(SWO_DMA_BUS, SWO_DMA_CHAN, DMA_CCR_PL_HIGH);
dma_enable_transfer_complete_interrupt(SWO_DMA_BUS, SWO_DMA_CHAN);
dma_enable_half_transfer_interrupt(SWO_DMA_BUS, SWO_DMA_CHAN);
dma_enable_circular_mode(SWO_DMA_BUS, SWO_DMA_CHAN);
usart_enable(SWO_UART);
nvic_enable_irq(SWO_DMA_IRQ);
write_index = read_index = 0;
dma_set_memory_address(SWO_DMA_BUS, SWO_DMA_CHAN, (uint32_t)pingpong_buf);
dma_set_number_of_data(SWO_DMA_BUS, SWO_DMA_CHAN, 2 * TRACE_ENDPOINT_SIZE);
dma_enable_channel(SWO_DMA_BUS, SWO_DMA_CHAN);
usart_enable_rx_dma(SWO_UART);
}
void SWO_DMA_ISR(void)
{
if (DMA_ISR(SWO_DMA_BUS) & DMA_ISR_HTIF(SWO_DMA_CHAN)) {
DMA_IFCR(SWO_DMA_BUS) |= DMA_ISR_HTIF(SWO_DMA_CHAN);
memcpy(&trace_rx_buf[write_index * TRACE_ENDPOINT_SIZE], pingpong_buf, TRACE_ENDPOINT_SIZE);
}
if (DMA_ISR(SWO_DMA_BUS) & DMA_ISR_TCIF(SWO_DMA_CHAN)) {
DMA_IFCR(SWO_DMA_BUS) |= DMA_ISR_TCIF(SWO_DMA_CHAN);
memcpy(
&trace_rx_buf[write_index * TRACE_ENDPOINT_SIZE], &pingpong_buf[TRACE_ENDPOINT_SIZE], TRACE_ENDPOINT_SIZE);
}
write_index = (write_index + 1U) % NUM_TRACE_PACKETS;
trace_buf_drain(usbdev, TRACE_ENDPOINT | USB_REQ_TYPE_IN);
}
void traceswo_init(uint32_t baudrate, uint32_t swo_chan_bitmask)
{
if (!baudrate)
baudrate = SWO_DEFAULT_BAUD;
rcc_periph_clock_enable(SWO_UART_CLK);
rcc_periph_clock_enable(SWO_DMA_CLK);
gpio_set_mode(SWO_UART_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, SWO_UART_RX_PIN);
gpio_set(SWO_UART_PORT, SWO_UART_RX_PIN);
nvic_set_priority(SWO_DMA_IRQ, IRQ_PRI_SWO_DMA);
nvic_enable_irq(SWO_DMA_IRQ);
traceswo_setspeed(baudrate);
traceswo_setmask(swo_chan_bitmask);
decoding = (swo_chan_bitmask != 0);
}