1#[doc = "Register `xtal32k` reader"]
2pub struct R(crate::R<XTAL32K_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<XTAL32K_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<XTAL32K_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<XTAL32K_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `xtal32k` writer"]
17pub struct W(crate::W<XTAL32K_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<XTAL32K_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<XTAL32K_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<XTAL32K_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `xtal32k_hiz_en` reader - "]
38pub type XTAL32K_HIZ_EN_R = crate::BitReader<bool>;
39#[doc = "Field `xtal32k_hiz_en` writer - "]
40pub type XTAL32K_HIZ_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
41#[doc = "Field `xtal32k_lowv_en` reader - "]
42pub type XTAL32K_LOWV_EN_R = crate::BitReader<bool>;
43#[doc = "Field `xtal32k_lowv_en` writer - "]
44pub type XTAL32K_LOWV_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
45#[doc = "Field `xtal32k_ext_sel` reader - "]
46pub type XTAL32K_EXT_SEL_R = crate::BitReader<bool>;
47#[doc = "Field `xtal32k_ext_sel` writer - "]
48pub type XTAL32K_EXT_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
49#[doc = "Field `xtal32k_amp_ctrl` reader - "]
50pub type XTAL32K_AMP_CTRL_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `xtal32k_amp_ctrl` writer - "]
52pub type XTAL32K_AMP_CTRL_W<'a, const O: u8> =
53 crate::FieldWriter<'a, u32, XTAL32K_SPEC, u8, u8, 2, O>;
54#[doc = "Field `xtal32k_reg` reader - "]
55pub type XTAL32K_REG_R = crate::FieldReader<u8, u8>;
56#[doc = "Field `xtal32k_reg` writer - "]
57pub type XTAL32K_REG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTAL32K_SPEC, u8, u8, 2, O>;
58#[doc = "Field `xtal32k_outbuf_stre` reader - "]
59pub type XTAL32K_OUTBUF_STRE_R = crate::BitReader<bool>;
60#[doc = "Field `xtal32k_outbuf_stre` writer - "]
61pub type XTAL32K_OUTBUF_STRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
62#[doc = "Field `xtal32k_otf_short` reader - "]
63pub type XTAL32K_OTF_SHORT_R = crate::BitReader<bool>;
64#[doc = "Field `xtal32k_otf_short` writer - "]
65pub type XTAL32K_OTF_SHORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
66#[doc = "Field `xtal32k_inv_stre` reader - "]
67pub type XTAL32K_INV_STRE_R = crate::FieldReader<u8, u8>;
68#[doc = "Field `xtal32k_inv_stre` writer - "]
69pub type XTAL32K_INV_STRE_W<'a, const O: u8> =
70 crate::FieldWriter<'a, u32, XTAL32K_SPEC, u8, u8, 2, O>;
71#[doc = "Field `xtal32k_capbank` reader - "]
72pub type XTAL32K_CAPBANK_R = crate::FieldReader<u8, u8>;
73#[doc = "Field `xtal32k_capbank` writer - "]
74pub type XTAL32K_CAPBANK_W<'a, const O: u8> =
75 crate::FieldWriter<'a, u32, XTAL32K_SPEC, u8, u8, 6, O>;
76#[doc = "Field `xtal32k_ac_cap_short` reader - "]
77pub type XTAL32K_AC_CAP_SHORT_R = crate::BitReader<bool>;
78#[doc = "Field `xtal32k_ac_cap_short` writer - "]
79pub type XTAL32K_AC_CAP_SHORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
80#[doc = "Field `pu_xtal32k_buf` reader - "]
81pub type PU_XTAL32K_BUF_R = crate::BitReader<bool>;
82#[doc = "Field `pu_xtal32k_buf` writer - "]
83pub type PU_XTAL32K_BUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
84#[doc = "Field `pu_xtal32k` reader - "]
85pub type PU_XTAL32K_R = crate::BitReader<bool>;
86#[doc = "Field `pu_xtal32k` writer - "]
87pub type PU_XTAL32K_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTAL32K_SPEC, bool, O>;
88impl R {
89 #[doc = "Bit 0"]
90 #[inline(always)]
91 pub fn xtal32k_hiz_en(&self) -> XTAL32K_HIZ_EN_R {
92 XTAL32K_HIZ_EN_R::new((self.bits & 1) != 0)
93 }
94 #[doc = "Bit 1"]
95 #[inline(always)]
96 pub fn xtal32k_lowv_en(&self) -> XTAL32K_LOWV_EN_R {
97 XTAL32K_LOWV_EN_R::new(((self.bits >> 1) & 1) != 0)
98 }
99 #[doc = "Bit 2"]
100 #[inline(always)]
101 pub fn xtal32k_ext_sel(&self) -> XTAL32K_EXT_SEL_R {
102 XTAL32K_EXT_SEL_R::new(((self.bits >> 2) & 1) != 0)
103 }
104 #[doc = "Bits 3:4"]
105 #[inline(always)]
106 pub fn xtal32k_amp_ctrl(&self) -> XTAL32K_AMP_CTRL_R {
107 XTAL32K_AMP_CTRL_R::new(((self.bits >> 3) & 3) as u8)
108 }
109 #[doc = "Bits 5:6"]
110 #[inline(always)]
111 pub fn xtal32k_reg(&self) -> XTAL32K_REG_R {
112 XTAL32K_REG_R::new(((self.bits >> 5) & 3) as u8)
113 }
114 #[doc = "Bit 7"]
115 #[inline(always)]
116 pub fn xtal32k_outbuf_stre(&self) -> XTAL32K_OUTBUF_STRE_R {
117 XTAL32K_OUTBUF_STRE_R::new(((self.bits >> 7) & 1) != 0)
118 }
119 #[doc = "Bit 8"]
120 #[inline(always)]
121 pub fn xtal32k_otf_short(&self) -> XTAL32K_OTF_SHORT_R {
122 XTAL32K_OTF_SHORT_R::new(((self.bits >> 8) & 1) != 0)
123 }
124 #[doc = "Bits 9:10"]
125 #[inline(always)]
126 pub fn xtal32k_inv_stre(&self) -> XTAL32K_INV_STRE_R {
127 XTAL32K_INV_STRE_R::new(((self.bits >> 9) & 3) as u8)
128 }
129 #[doc = "Bits 11:16"]
130 #[inline(always)]
131 pub fn xtal32k_capbank(&self) -> XTAL32K_CAPBANK_R {
132 XTAL32K_CAPBANK_R::new(((self.bits >> 11) & 0x3f) as u8)
133 }
134 #[doc = "Bit 17"]
135 #[inline(always)]
136 pub fn xtal32k_ac_cap_short(&self) -> XTAL32K_AC_CAP_SHORT_R {
137 XTAL32K_AC_CAP_SHORT_R::new(((self.bits >> 17) & 1) != 0)
138 }
139 #[doc = "Bit 18"]
140 #[inline(always)]
141 pub fn pu_xtal32k_buf(&self) -> PU_XTAL32K_BUF_R {
142 PU_XTAL32K_BUF_R::new(((self.bits >> 18) & 1) != 0)
143 }
144 #[doc = "Bit 19"]
145 #[inline(always)]
146 pub fn pu_xtal32k(&self) -> PU_XTAL32K_R {
147 PU_XTAL32K_R::new(((self.bits >> 19) & 1) != 0)
148 }
149}
150impl W {
151 #[doc = "Bit 0"]
152 #[inline(always)]
153 #[must_use]
154 pub fn xtal32k_hiz_en(&mut self) -> XTAL32K_HIZ_EN_W<0> {
155 XTAL32K_HIZ_EN_W::new(self)
156 }
157 #[doc = "Bit 1"]
158 #[inline(always)]
159 #[must_use]
160 pub fn xtal32k_lowv_en(&mut self) -> XTAL32K_LOWV_EN_W<1> {
161 XTAL32K_LOWV_EN_W::new(self)
162 }
163 #[doc = "Bit 2"]
164 #[inline(always)]
165 #[must_use]
166 pub fn xtal32k_ext_sel(&mut self) -> XTAL32K_EXT_SEL_W<2> {
167 XTAL32K_EXT_SEL_W::new(self)
168 }
169 #[doc = "Bits 3:4"]
170 #[inline(always)]
171 #[must_use]
172 pub fn xtal32k_amp_ctrl(&mut self) -> XTAL32K_AMP_CTRL_W<3> {
173 XTAL32K_AMP_CTRL_W::new(self)
174 }
175 #[doc = "Bits 5:6"]
176 #[inline(always)]
177 #[must_use]
178 pub fn xtal32k_reg(&mut self) -> XTAL32K_REG_W<5> {
179 XTAL32K_REG_W::new(self)
180 }
181 #[doc = "Bit 7"]
182 #[inline(always)]
183 #[must_use]
184 pub fn xtal32k_outbuf_stre(&mut self) -> XTAL32K_OUTBUF_STRE_W<7> {
185 XTAL32K_OUTBUF_STRE_W::new(self)
186 }
187 #[doc = "Bit 8"]
188 #[inline(always)]
189 #[must_use]
190 pub fn xtal32k_otf_short(&mut self) -> XTAL32K_OTF_SHORT_W<8> {
191 XTAL32K_OTF_SHORT_W::new(self)
192 }
193 #[doc = "Bits 9:10"]
194 #[inline(always)]
195 #[must_use]
196 pub fn xtal32k_inv_stre(&mut self) -> XTAL32K_INV_STRE_W<9> {
197 XTAL32K_INV_STRE_W::new(self)
198 }
199 #[doc = "Bits 11:16"]
200 #[inline(always)]
201 #[must_use]
202 pub fn xtal32k_capbank(&mut self) -> XTAL32K_CAPBANK_W<11> {
203 XTAL32K_CAPBANK_W::new(self)
204 }
205 #[doc = "Bit 17"]
206 #[inline(always)]
207 #[must_use]
208 pub fn xtal32k_ac_cap_short(&mut self) -> XTAL32K_AC_CAP_SHORT_W<17> {
209 XTAL32K_AC_CAP_SHORT_W::new(self)
210 }
211 #[doc = "Bit 18"]
212 #[inline(always)]
213 #[must_use]
214 pub fn pu_xtal32k_buf(&mut self) -> PU_XTAL32K_BUF_W<18> {
215 PU_XTAL32K_BUF_W::new(self)
216 }
217 #[doc = "Bit 19"]
218 #[inline(always)]
219 #[must_use]
220 pub fn pu_xtal32k(&mut self) -> PU_XTAL32K_W<19> {
221 PU_XTAL32K_W::new(self)
222 }
223 #[doc = "Writes raw bits to the register."]
224 #[inline(always)]
225 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
226 self.0.bits(bits);
227 self
228 }
229}
230#[doc = "xtal32k.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtal32k](index.html) module"]
231pub struct XTAL32K_SPEC;
232impl crate::RegisterSpec for XTAL32K_SPEC {
233 type Ux = u32;
234}
235#[doc = "`read()` method returns [xtal32k::R](R) reader structure"]
236impl crate::Readable for XTAL32K_SPEC {
237 type Reader = R;
238}
239#[doc = "`write(|w| ..)` method takes [xtal32k::W](W) writer structure"]
240impl crate::Writable for XTAL32K_SPEC {
241 type Writer = W;
242 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
243 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244}
245#[doc = "`reset()` method sets xtal32k to value 0"]
246impl crate::Resettable for XTAL32K_SPEC {
247 const RESET_VALUE: Self::Ux = 0;
248}