bl702_pac/glb/
gpio_cfgctl30.rs

1#[doc = "Register `GPIO_CFGCTL30` reader"]
2pub struct R(crate::R<GPIO_CFGCTL30_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<GPIO_CFGCTL30_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<GPIO_CFGCTL30_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<GPIO_CFGCTL30_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `GPIO_CFGCTL30` writer"]
17pub struct W(crate::W<GPIO_CFGCTL30_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<GPIO_CFGCTL30_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<GPIO_CFGCTL30_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<GPIO_CFGCTL30_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `reg_gpio_0_i` reader - "]
38pub type REG_GPIO_0_I_R = crate::BitReader<bool>;
39#[doc = "Field `reg_gpio_0_i` writer - "]
40pub type REG_GPIO_0_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
41#[doc = "Field `reg_gpio_1_i` reader - "]
42pub type REG_GPIO_1_I_R = crate::BitReader<bool>;
43#[doc = "Field `reg_gpio_1_i` writer - "]
44pub type REG_GPIO_1_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
45#[doc = "Field `reg_gpio_2_i` reader - "]
46pub type REG_GPIO_2_I_R = crate::BitReader<bool>;
47#[doc = "Field `reg_gpio_2_i` writer - "]
48pub type REG_GPIO_2_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
49#[doc = "Field `reg_gpio_3_i` reader - "]
50pub type REG_GPIO_3_I_R = crate::BitReader<bool>;
51#[doc = "Field `reg_gpio_3_i` writer - "]
52pub type REG_GPIO_3_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
53#[doc = "Field `reg_gpio_4_i` reader - "]
54pub type REG_GPIO_4_I_R = crate::BitReader<bool>;
55#[doc = "Field `reg_gpio_4_i` writer - "]
56pub type REG_GPIO_4_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
57#[doc = "Field `reg_gpio_5_i` reader - "]
58pub type REG_GPIO_5_I_R = crate::BitReader<bool>;
59#[doc = "Field `reg_gpio_5_i` writer - "]
60pub type REG_GPIO_5_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
61#[doc = "Field `reg_gpio_6_i` reader - "]
62pub type REG_GPIO_6_I_R = crate::BitReader<bool>;
63#[doc = "Field `reg_gpio_6_i` writer - "]
64pub type REG_GPIO_6_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
65#[doc = "Field `reg_gpio_7_i` reader - "]
66pub type REG_GPIO_7_I_R = crate::BitReader<bool>;
67#[doc = "Field `reg_gpio_7_i` writer - "]
68pub type REG_GPIO_7_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
69#[doc = "Field `reg_gpio_8_i` reader - "]
70pub type REG_GPIO_8_I_R = crate::BitReader<bool>;
71#[doc = "Field `reg_gpio_8_i` writer - "]
72pub type REG_GPIO_8_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
73#[doc = "Field `reg_gpio_9_i` reader - "]
74pub type REG_GPIO_9_I_R = crate::BitReader<bool>;
75#[doc = "Field `reg_gpio_9_i` writer - "]
76pub type REG_GPIO_9_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
77#[doc = "Field `reg_gpio_10_i` reader - "]
78pub type REG_GPIO_10_I_R = crate::BitReader<bool>;
79#[doc = "Field `reg_gpio_10_i` writer - "]
80pub type REG_GPIO_10_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
81#[doc = "Field `reg_gpio_11_i` reader - "]
82pub type REG_GPIO_11_I_R = crate::BitReader<bool>;
83#[doc = "Field `reg_gpio_11_i` writer - "]
84pub type REG_GPIO_11_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
85#[doc = "Field `reg_gpio_12_i` reader - "]
86pub type REG_GPIO_12_I_R = crate::BitReader<bool>;
87#[doc = "Field `reg_gpio_12_i` writer - "]
88pub type REG_GPIO_12_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
89#[doc = "Field `reg_gpio_13_i` reader - "]
90pub type REG_GPIO_13_I_R = crate::BitReader<bool>;
91#[doc = "Field `reg_gpio_13_i` writer - "]
92pub type REG_GPIO_13_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
93#[doc = "Field `reg_gpio_14_i` reader - "]
94pub type REG_GPIO_14_I_R = crate::BitReader<bool>;
95#[doc = "Field `reg_gpio_14_i` writer - "]
96pub type REG_GPIO_14_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
97#[doc = "Field `reg_gpio_15_i` reader - "]
98pub type REG_GPIO_15_I_R = crate::BitReader<bool>;
99#[doc = "Field `reg_gpio_15_i` writer - "]
100pub type REG_GPIO_15_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
101#[doc = "Field `reg_gpio_16_i` reader - "]
102pub type REG_GPIO_16_I_R = crate::BitReader<bool>;
103#[doc = "Field `reg_gpio_16_i` writer - "]
104pub type REG_GPIO_16_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
105#[doc = "Field `reg_gpio_17_i` reader - "]
106pub type REG_GPIO_17_I_R = crate::BitReader<bool>;
107#[doc = "Field `reg_gpio_17_i` writer - "]
108pub type REG_GPIO_17_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
109#[doc = "Field `reg_gpio_18_i` reader - "]
110pub type REG_GPIO_18_I_R = crate::BitReader<bool>;
111#[doc = "Field `reg_gpio_18_i` writer - "]
112pub type REG_GPIO_18_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
113#[doc = "Field `reg_gpio_19_i` reader - "]
114pub type REG_GPIO_19_I_R = crate::BitReader<bool>;
115#[doc = "Field `reg_gpio_19_i` writer - "]
116pub type REG_GPIO_19_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
117#[doc = "Field `reg_gpio_20_i` reader - "]
118pub type REG_GPIO_20_I_R = crate::BitReader<bool>;
119#[doc = "Field `reg_gpio_20_i` writer - "]
120pub type REG_GPIO_20_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
121#[doc = "Field `reg_gpio_21_i` reader - "]
122pub type REG_GPIO_21_I_R = crate::BitReader<bool>;
123#[doc = "Field `reg_gpio_21_i` writer - "]
124pub type REG_GPIO_21_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
125#[doc = "Field `reg_gpio_22_i` reader - "]
126pub type REG_GPIO_22_I_R = crate::BitReader<bool>;
127#[doc = "Field `reg_gpio_22_i` writer - "]
128pub type REG_GPIO_22_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
129#[doc = "Field `reg_gpio_23_i` reader - "]
130pub type REG_GPIO_23_I_R = crate::BitReader<bool>;
131#[doc = "Field `reg_gpio_23_i` writer - "]
132pub type REG_GPIO_23_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
133#[doc = "Field `reg_gpio_24_i` reader - "]
134pub type REG_GPIO_24_I_R = crate::BitReader<bool>;
135#[doc = "Field `reg_gpio_24_i` writer - "]
136pub type REG_GPIO_24_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
137#[doc = "Field `reg_gpio_25_i` reader - "]
138pub type REG_GPIO_25_I_R = crate::BitReader<bool>;
139#[doc = "Field `reg_gpio_25_i` writer - "]
140pub type REG_GPIO_25_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
141#[doc = "Field `reg_gpio_26_i` reader - "]
142pub type REG_GPIO_26_I_R = crate::BitReader<bool>;
143#[doc = "Field `reg_gpio_26_i` writer - "]
144pub type REG_GPIO_26_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
145#[doc = "Field `reg_gpio_27_i` reader - "]
146pub type REG_GPIO_27_I_R = crate::BitReader<bool>;
147#[doc = "Field `reg_gpio_27_i` writer - "]
148pub type REG_GPIO_27_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
149#[doc = "Field `reg_gpio_28_i` reader - "]
150pub type REG_GPIO_28_I_R = crate::BitReader<bool>;
151#[doc = "Field `reg_gpio_28_i` writer - "]
152pub type REG_GPIO_28_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
153#[doc = "Field `reg_gpio_29_i` reader - "]
154pub type REG_GPIO_29_I_R = crate::BitReader<bool>;
155#[doc = "Field `reg_gpio_29_i` writer - "]
156pub type REG_GPIO_29_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
157#[doc = "Field `reg_gpio_30_i` reader - "]
158pub type REG_GPIO_30_I_R = crate::BitReader<bool>;
159#[doc = "Field `reg_gpio_30_i` writer - "]
160pub type REG_GPIO_30_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
161#[doc = "Field `reg_gpio_31_i` reader - "]
162pub type REG_GPIO_31_I_R = crate::BitReader<bool>;
163#[doc = "Field `reg_gpio_31_i` writer - "]
164pub type REG_GPIO_31_I_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CFGCTL30_SPEC, bool, O>;
165impl R {
166    #[doc = "Bit 0"]
167    #[inline(always)]
168    pub fn reg_gpio_0_i(&self) -> REG_GPIO_0_I_R {
169        REG_GPIO_0_I_R::new((self.bits & 1) != 0)
170    }
171    #[doc = "Bit 1"]
172    #[inline(always)]
173    pub fn reg_gpio_1_i(&self) -> REG_GPIO_1_I_R {
174        REG_GPIO_1_I_R::new(((self.bits >> 1) & 1) != 0)
175    }
176    #[doc = "Bit 2"]
177    #[inline(always)]
178    pub fn reg_gpio_2_i(&self) -> REG_GPIO_2_I_R {
179        REG_GPIO_2_I_R::new(((self.bits >> 2) & 1) != 0)
180    }
181    #[doc = "Bit 3"]
182    #[inline(always)]
183    pub fn reg_gpio_3_i(&self) -> REG_GPIO_3_I_R {
184        REG_GPIO_3_I_R::new(((self.bits >> 3) & 1) != 0)
185    }
186    #[doc = "Bit 4"]
187    #[inline(always)]
188    pub fn reg_gpio_4_i(&self) -> REG_GPIO_4_I_R {
189        REG_GPIO_4_I_R::new(((self.bits >> 4) & 1) != 0)
190    }
191    #[doc = "Bit 5"]
192    #[inline(always)]
193    pub fn reg_gpio_5_i(&self) -> REG_GPIO_5_I_R {
194        REG_GPIO_5_I_R::new(((self.bits >> 5) & 1) != 0)
195    }
196    #[doc = "Bit 6"]
197    #[inline(always)]
198    pub fn reg_gpio_6_i(&self) -> REG_GPIO_6_I_R {
199        REG_GPIO_6_I_R::new(((self.bits >> 6) & 1) != 0)
200    }
201    #[doc = "Bit 7"]
202    #[inline(always)]
203    pub fn reg_gpio_7_i(&self) -> REG_GPIO_7_I_R {
204        REG_GPIO_7_I_R::new(((self.bits >> 7) & 1) != 0)
205    }
206    #[doc = "Bit 8"]
207    #[inline(always)]
208    pub fn reg_gpio_8_i(&self) -> REG_GPIO_8_I_R {
209        REG_GPIO_8_I_R::new(((self.bits >> 8) & 1) != 0)
210    }
211    #[doc = "Bit 9"]
212    #[inline(always)]
213    pub fn reg_gpio_9_i(&self) -> REG_GPIO_9_I_R {
214        REG_GPIO_9_I_R::new(((self.bits >> 9) & 1) != 0)
215    }
216    #[doc = "Bit 10"]
217    #[inline(always)]
218    pub fn reg_gpio_10_i(&self) -> REG_GPIO_10_I_R {
219        REG_GPIO_10_I_R::new(((self.bits >> 10) & 1) != 0)
220    }
221    #[doc = "Bit 11"]
222    #[inline(always)]
223    pub fn reg_gpio_11_i(&self) -> REG_GPIO_11_I_R {
224        REG_GPIO_11_I_R::new(((self.bits >> 11) & 1) != 0)
225    }
226    #[doc = "Bit 12"]
227    #[inline(always)]
228    pub fn reg_gpio_12_i(&self) -> REG_GPIO_12_I_R {
229        REG_GPIO_12_I_R::new(((self.bits >> 12) & 1) != 0)
230    }
231    #[doc = "Bit 13"]
232    #[inline(always)]
233    pub fn reg_gpio_13_i(&self) -> REG_GPIO_13_I_R {
234        REG_GPIO_13_I_R::new(((self.bits >> 13) & 1) != 0)
235    }
236    #[doc = "Bit 14"]
237    #[inline(always)]
238    pub fn reg_gpio_14_i(&self) -> REG_GPIO_14_I_R {
239        REG_GPIO_14_I_R::new(((self.bits >> 14) & 1) != 0)
240    }
241    #[doc = "Bit 15"]
242    #[inline(always)]
243    pub fn reg_gpio_15_i(&self) -> REG_GPIO_15_I_R {
244        REG_GPIO_15_I_R::new(((self.bits >> 15) & 1) != 0)
245    }
246    #[doc = "Bit 16"]
247    #[inline(always)]
248    pub fn reg_gpio_16_i(&self) -> REG_GPIO_16_I_R {
249        REG_GPIO_16_I_R::new(((self.bits >> 16) & 1) != 0)
250    }
251    #[doc = "Bit 17"]
252    #[inline(always)]
253    pub fn reg_gpio_17_i(&self) -> REG_GPIO_17_I_R {
254        REG_GPIO_17_I_R::new(((self.bits >> 17) & 1) != 0)
255    }
256    #[doc = "Bit 18"]
257    #[inline(always)]
258    pub fn reg_gpio_18_i(&self) -> REG_GPIO_18_I_R {
259        REG_GPIO_18_I_R::new(((self.bits >> 18) & 1) != 0)
260    }
261    #[doc = "Bit 19"]
262    #[inline(always)]
263    pub fn reg_gpio_19_i(&self) -> REG_GPIO_19_I_R {
264        REG_GPIO_19_I_R::new(((self.bits >> 19) & 1) != 0)
265    }
266    #[doc = "Bit 20"]
267    #[inline(always)]
268    pub fn reg_gpio_20_i(&self) -> REG_GPIO_20_I_R {
269        REG_GPIO_20_I_R::new(((self.bits >> 20) & 1) != 0)
270    }
271    #[doc = "Bit 21"]
272    #[inline(always)]
273    pub fn reg_gpio_21_i(&self) -> REG_GPIO_21_I_R {
274        REG_GPIO_21_I_R::new(((self.bits >> 21) & 1) != 0)
275    }
276    #[doc = "Bit 22"]
277    #[inline(always)]
278    pub fn reg_gpio_22_i(&self) -> REG_GPIO_22_I_R {
279        REG_GPIO_22_I_R::new(((self.bits >> 22) & 1) != 0)
280    }
281    #[doc = "Bit 23"]
282    #[inline(always)]
283    pub fn reg_gpio_23_i(&self) -> REG_GPIO_23_I_R {
284        REG_GPIO_23_I_R::new(((self.bits >> 23) & 1) != 0)
285    }
286    #[doc = "Bit 24"]
287    #[inline(always)]
288    pub fn reg_gpio_24_i(&self) -> REG_GPIO_24_I_R {
289        REG_GPIO_24_I_R::new(((self.bits >> 24) & 1) != 0)
290    }
291    #[doc = "Bit 25"]
292    #[inline(always)]
293    pub fn reg_gpio_25_i(&self) -> REG_GPIO_25_I_R {
294        REG_GPIO_25_I_R::new(((self.bits >> 25) & 1) != 0)
295    }
296    #[doc = "Bit 26"]
297    #[inline(always)]
298    pub fn reg_gpio_26_i(&self) -> REG_GPIO_26_I_R {
299        REG_GPIO_26_I_R::new(((self.bits >> 26) & 1) != 0)
300    }
301    #[doc = "Bit 27"]
302    #[inline(always)]
303    pub fn reg_gpio_27_i(&self) -> REG_GPIO_27_I_R {
304        REG_GPIO_27_I_R::new(((self.bits >> 27) & 1) != 0)
305    }
306    #[doc = "Bit 28"]
307    #[inline(always)]
308    pub fn reg_gpio_28_i(&self) -> REG_GPIO_28_I_R {
309        REG_GPIO_28_I_R::new(((self.bits >> 28) & 1) != 0)
310    }
311    #[doc = "Bit 29"]
312    #[inline(always)]
313    pub fn reg_gpio_29_i(&self) -> REG_GPIO_29_I_R {
314        REG_GPIO_29_I_R::new(((self.bits >> 29) & 1) != 0)
315    }
316    #[doc = "Bit 30"]
317    #[inline(always)]
318    pub fn reg_gpio_30_i(&self) -> REG_GPIO_30_I_R {
319        REG_GPIO_30_I_R::new(((self.bits >> 30) & 1) != 0)
320    }
321    #[doc = "Bit 31"]
322    #[inline(always)]
323    pub fn reg_gpio_31_i(&self) -> REG_GPIO_31_I_R {
324        REG_GPIO_31_I_R::new(((self.bits >> 31) & 1) != 0)
325    }
326}
327impl W {
328    #[doc = "Bit 0"]
329    #[inline(always)]
330    #[must_use]
331    pub fn reg_gpio_0_i(&mut self) -> REG_GPIO_0_I_W<0> {
332        REG_GPIO_0_I_W::new(self)
333    }
334    #[doc = "Bit 1"]
335    #[inline(always)]
336    #[must_use]
337    pub fn reg_gpio_1_i(&mut self) -> REG_GPIO_1_I_W<1> {
338        REG_GPIO_1_I_W::new(self)
339    }
340    #[doc = "Bit 2"]
341    #[inline(always)]
342    #[must_use]
343    pub fn reg_gpio_2_i(&mut self) -> REG_GPIO_2_I_W<2> {
344        REG_GPIO_2_I_W::new(self)
345    }
346    #[doc = "Bit 3"]
347    #[inline(always)]
348    #[must_use]
349    pub fn reg_gpio_3_i(&mut self) -> REG_GPIO_3_I_W<3> {
350        REG_GPIO_3_I_W::new(self)
351    }
352    #[doc = "Bit 4"]
353    #[inline(always)]
354    #[must_use]
355    pub fn reg_gpio_4_i(&mut self) -> REG_GPIO_4_I_W<4> {
356        REG_GPIO_4_I_W::new(self)
357    }
358    #[doc = "Bit 5"]
359    #[inline(always)]
360    #[must_use]
361    pub fn reg_gpio_5_i(&mut self) -> REG_GPIO_5_I_W<5> {
362        REG_GPIO_5_I_W::new(self)
363    }
364    #[doc = "Bit 6"]
365    #[inline(always)]
366    #[must_use]
367    pub fn reg_gpio_6_i(&mut self) -> REG_GPIO_6_I_W<6> {
368        REG_GPIO_6_I_W::new(self)
369    }
370    #[doc = "Bit 7"]
371    #[inline(always)]
372    #[must_use]
373    pub fn reg_gpio_7_i(&mut self) -> REG_GPIO_7_I_W<7> {
374        REG_GPIO_7_I_W::new(self)
375    }
376    #[doc = "Bit 8"]
377    #[inline(always)]
378    #[must_use]
379    pub fn reg_gpio_8_i(&mut self) -> REG_GPIO_8_I_W<8> {
380        REG_GPIO_8_I_W::new(self)
381    }
382    #[doc = "Bit 9"]
383    #[inline(always)]
384    #[must_use]
385    pub fn reg_gpio_9_i(&mut self) -> REG_GPIO_9_I_W<9> {
386        REG_GPIO_9_I_W::new(self)
387    }
388    #[doc = "Bit 10"]
389    #[inline(always)]
390    #[must_use]
391    pub fn reg_gpio_10_i(&mut self) -> REG_GPIO_10_I_W<10> {
392        REG_GPIO_10_I_W::new(self)
393    }
394    #[doc = "Bit 11"]
395    #[inline(always)]
396    #[must_use]
397    pub fn reg_gpio_11_i(&mut self) -> REG_GPIO_11_I_W<11> {
398        REG_GPIO_11_I_W::new(self)
399    }
400    #[doc = "Bit 12"]
401    #[inline(always)]
402    #[must_use]
403    pub fn reg_gpio_12_i(&mut self) -> REG_GPIO_12_I_W<12> {
404        REG_GPIO_12_I_W::new(self)
405    }
406    #[doc = "Bit 13"]
407    #[inline(always)]
408    #[must_use]
409    pub fn reg_gpio_13_i(&mut self) -> REG_GPIO_13_I_W<13> {
410        REG_GPIO_13_I_W::new(self)
411    }
412    #[doc = "Bit 14"]
413    #[inline(always)]
414    #[must_use]
415    pub fn reg_gpio_14_i(&mut self) -> REG_GPIO_14_I_W<14> {
416        REG_GPIO_14_I_W::new(self)
417    }
418    #[doc = "Bit 15"]
419    #[inline(always)]
420    #[must_use]
421    pub fn reg_gpio_15_i(&mut self) -> REG_GPIO_15_I_W<15> {
422        REG_GPIO_15_I_W::new(self)
423    }
424    #[doc = "Bit 16"]
425    #[inline(always)]
426    #[must_use]
427    pub fn reg_gpio_16_i(&mut self) -> REG_GPIO_16_I_W<16> {
428        REG_GPIO_16_I_W::new(self)
429    }
430    #[doc = "Bit 17"]
431    #[inline(always)]
432    #[must_use]
433    pub fn reg_gpio_17_i(&mut self) -> REG_GPIO_17_I_W<17> {
434        REG_GPIO_17_I_W::new(self)
435    }
436    #[doc = "Bit 18"]
437    #[inline(always)]
438    #[must_use]
439    pub fn reg_gpio_18_i(&mut self) -> REG_GPIO_18_I_W<18> {
440        REG_GPIO_18_I_W::new(self)
441    }
442    #[doc = "Bit 19"]
443    #[inline(always)]
444    #[must_use]
445    pub fn reg_gpio_19_i(&mut self) -> REG_GPIO_19_I_W<19> {
446        REG_GPIO_19_I_W::new(self)
447    }
448    #[doc = "Bit 20"]
449    #[inline(always)]
450    #[must_use]
451    pub fn reg_gpio_20_i(&mut self) -> REG_GPIO_20_I_W<20> {
452        REG_GPIO_20_I_W::new(self)
453    }
454    #[doc = "Bit 21"]
455    #[inline(always)]
456    #[must_use]
457    pub fn reg_gpio_21_i(&mut self) -> REG_GPIO_21_I_W<21> {
458        REG_GPIO_21_I_W::new(self)
459    }
460    #[doc = "Bit 22"]
461    #[inline(always)]
462    #[must_use]
463    pub fn reg_gpio_22_i(&mut self) -> REG_GPIO_22_I_W<22> {
464        REG_GPIO_22_I_W::new(self)
465    }
466    #[doc = "Bit 23"]
467    #[inline(always)]
468    #[must_use]
469    pub fn reg_gpio_23_i(&mut self) -> REG_GPIO_23_I_W<23> {
470        REG_GPIO_23_I_W::new(self)
471    }
472    #[doc = "Bit 24"]
473    #[inline(always)]
474    #[must_use]
475    pub fn reg_gpio_24_i(&mut self) -> REG_GPIO_24_I_W<24> {
476        REG_GPIO_24_I_W::new(self)
477    }
478    #[doc = "Bit 25"]
479    #[inline(always)]
480    #[must_use]
481    pub fn reg_gpio_25_i(&mut self) -> REG_GPIO_25_I_W<25> {
482        REG_GPIO_25_I_W::new(self)
483    }
484    #[doc = "Bit 26"]
485    #[inline(always)]
486    #[must_use]
487    pub fn reg_gpio_26_i(&mut self) -> REG_GPIO_26_I_W<26> {
488        REG_GPIO_26_I_W::new(self)
489    }
490    #[doc = "Bit 27"]
491    #[inline(always)]
492    #[must_use]
493    pub fn reg_gpio_27_i(&mut self) -> REG_GPIO_27_I_W<27> {
494        REG_GPIO_27_I_W::new(self)
495    }
496    #[doc = "Bit 28"]
497    #[inline(always)]
498    #[must_use]
499    pub fn reg_gpio_28_i(&mut self) -> REG_GPIO_28_I_W<28> {
500        REG_GPIO_28_I_W::new(self)
501    }
502    #[doc = "Bit 29"]
503    #[inline(always)]
504    #[must_use]
505    pub fn reg_gpio_29_i(&mut self) -> REG_GPIO_29_I_W<29> {
506        REG_GPIO_29_I_W::new(self)
507    }
508    #[doc = "Bit 30"]
509    #[inline(always)]
510    #[must_use]
511    pub fn reg_gpio_30_i(&mut self) -> REG_GPIO_30_I_W<30> {
512        REG_GPIO_30_I_W::new(self)
513    }
514    #[doc = "Bit 31"]
515    #[inline(always)]
516    #[must_use]
517    pub fn reg_gpio_31_i(&mut self) -> REG_GPIO_31_I_W<31> {
518        REG_GPIO_31_I_W::new(self)
519    }
520    #[doc = "Writes raw bits to the register."]
521    #[inline(always)]
522    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
523        self.0.bits(bits);
524        self
525    }
526}
527#[doc = "GPIO_CFGCTL30.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_cfgctl30](index.html) module"]
528pub struct GPIO_CFGCTL30_SPEC;
529impl crate::RegisterSpec for GPIO_CFGCTL30_SPEC {
530    type Ux = u32;
531}
532#[doc = "`read()` method returns [gpio_cfgctl30::R](R) reader structure"]
533impl crate::Readable for GPIO_CFGCTL30_SPEC {
534    type Reader = R;
535}
536#[doc = "`write(|w| ..)` method takes [gpio_cfgctl30::W](W) writer structure"]
537impl crate::Writable for GPIO_CFGCTL30_SPEC {
538    type Writer = W;
539    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
540    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
541}
542#[doc = "`reset()` method sets GPIO_CFGCTL30 to value 0"]
543impl crate::Resettable for GPIO_CFGCTL30_SPEC {
544    const RESET_VALUE: Self::Ux = 0;
545}
bl702_pac/glb/gpio_cfgctl30.rs

bl702_pac/glb/
gpio_cfgctl30.rs
