bl602_pac/dma/
dma_c2control.rs

1#[doc = "Register `DMA_C2Control` reader"]
2pub struct R(crate::R<DMA_C2CONTROL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMA_C2CONTROL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMA_C2CONTROL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMA_C2CONTROL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DMA_C2Control` writer"]
17pub struct W(crate::W<DMA_C2CONTROL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMA_C2CONTROL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMA_C2CONTROL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMA_C2CONTROL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TransferSize` reader - "]
38pub type TRANSFER_SIZE_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `TransferSize` writer - "]
40pub type TRANSFER_SIZE_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, DMA_C2CONTROL_SPEC, u16, u16, 12, O>;
42#[doc = "Field `SBSize` reader - "]
43pub type SBSIZE_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `SBSize` writer - "]
45pub type SBSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C2CONTROL_SPEC, u8, u8, 3, O>;
46#[doc = "Field `DBSize` reader - "]
47pub type DBSIZE_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `DBSize` writer - "]
49pub type DBSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C2CONTROL_SPEC, u8, u8, 3, O>;
50#[doc = "Field `SWidth` reader - "]
51pub type SWIDTH_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `SWidth` writer - "]
53pub type SWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C2CONTROL_SPEC, u8, u8, 3, O>;
54#[doc = "Field `DWidth` reader - "]
55pub type DWIDTH_R = crate::FieldReader<u8, u8>;
56#[doc = "Field `DWidth` writer - "]
57pub type DWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C2CONTROL_SPEC, u8, u8, 3, O>;
58#[doc = "Field `SI` reader - "]
59pub type SI_R = crate::BitReader<bool>;
60#[doc = "Field `SI` writer - "]
61pub type SI_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONTROL_SPEC, bool, O>;
62#[doc = "Field `DI` reader - "]
63pub type DI_R = crate::BitReader<bool>;
64#[doc = "Field `DI` writer - "]
65pub type DI_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONTROL_SPEC, bool, O>;
66#[doc = "Field `Prot` reader - "]
67pub type PROT_R = crate::FieldReader<u8, u8>;
68#[doc = "Field `Prot` writer - "]
69pub type PROT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C2CONTROL_SPEC, u8, u8, 3, O>;
70#[doc = "Field `I` reader - "]
71pub type I_R = crate::BitReader<bool>;
72#[doc = "Field `I` writer - "]
73pub type I_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C2CONTROL_SPEC, bool, O>;
74impl R {
75    #[doc = "Bits 0:11"]
76    #[inline(always)]
77    pub fn transfer_size(&self) -> TRANSFER_SIZE_R {
78        TRANSFER_SIZE_R::new((self.bits & 0x0fff) as u16)
79    }
80    #[doc = "Bits 12:14"]
81    #[inline(always)]
82    pub fn sbsize(&self) -> SBSIZE_R {
83        SBSIZE_R::new(((self.bits >> 12) & 7) as u8)
84    }
85    #[doc = "Bits 15:17"]
86    #[inline(always)]
87    pub fn dbsize(&self) -> DBSIZE_R {
88        DBSIZE_R::new(((self.bits >> 15) & 7) as u8)
89    }
90    #[doc = "Bits 18:20"]
91    #[inline(always)]
92    pub fn swidth(&self) -> SWIDTH_R {
93        SWIDTH_R::new(((self.bits >> 18) & 7) as u8)
94    }
95    #[doc = "Bits 21:23"]
96    #[inline(always)]
97    pub fn dwidth(&self) -> DWIDTH_R {
98        DWIDTH_R::new(((self.bits >> 21) & 7) as u8)
99    }
100    #[doc = "Bit 26"]
101    #[inline(always)]
102    pub fn si(&self) -> SI_R {
103        SI_R::new(((self.bits >> 26) & 1) != 0)
104    }
105    #[doc = "Bit 27"]
106    #[inline(always)]
107    pub fn di(&self) -> DI_R {
108        DI_R::new(((self.bits >> 27) & 1) != 0)
109    }
110    #[doc = "Bits 28:30"]
111    #[inline(always)]
112    pub fn prot(&self) -> PROT_R {
113        PROT_R::new(((self.bits >> 28) & 7) as u8)
114    }
115    #[doc = "Bit 31"]
116    #[inline(always)]
117    pub fn i(&self) -> I_R {
118        I_R::new(((self.bits >> 31) & 1) != 0)
119    }
120}
121impl W {
122    #[doc = "Bits 0:11"]
123    #[inline(always)]
124    #[must_use]
125    pub fn transfer_size(&mut self) -> TRANSFER_SIZE_W<0> {
126        TRANSFER_SIZE_W::new(self)
127    }
128    #[doc = "Bits 12:14"]
129    #[inline(always)]
130    #[must_use]
131    pub fn sbsize(&mut self) -> SBSIZE_W<12> {
132        SBSIZE_W::new(self)
133    }
134    #[doc = "Bits 15:17"]
135    #[inline(always)]
136    #[must_use]
137    pub fn dbsize(&mut self) -> DBSIZE_W<15> {
138        DBSIZE_W::new(self)
139    }
140    #[doc = "Bits 18:20"]
141    #[inline(always)]
142    #[must_use]
143    pub fn swidth(&mut self) -> SWIDTH_W<18> {
144        SWIDTH_W::new(self)
145    }
146    #[doc = "Bits 21:23"]
147    #[inline(always)]
148    #[must_use]
149    pub fn dwidth(&mut self) -> DWIDTH_W<21> {
150        DWIDTH_W::new(self)
151    }
152    #[doc = "Bit 26"]
153    #[inline(always)]
154    #[must_use]
155    pub fn si(&mut self) -> SI_W<26> {
156        SI_W::new(self)
157    }
158    #[doc = "Bit 27"]
159    #[inline(always)]
160    #[must_use]
161    pub fn di(&mut self) -> DI_W<27> {
162        DI_W::new(self)
163    }
164    #[doc = "Bits 28:30"]
165    #[inline(always)]
166    #[must_use]
167    pub fn prot(&mut self) -> PROT_W<28> {
168        PROT_W::new(self)
169    }
170    #[doc = "Bit 31"]
171    #[inline(always)]
172    #[must_use]
173    pub fn i(&mut self) -> I_W<31> {
174        I_W::new(self)
175    }
176    #[doc = "Writes raw bits to the register."]
177    #[inline(always)]
178    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
179        self.0.bits(bits);
180        self
181    }
182}
183#[doc = "DMA_C2Control.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_c2control](index.html) module"]
184pub struct DMA_C2CONTROL_SPEC;
185impl crate::RegisterSpec for DMA_C2CONTROL_SPEC {
186    type Ux = u32;
187}
188#[doc = "`read()` method returns [dma_c2control::R](R) reader structure"]
189impl crate::Readable for DMA_C2CONTROL_SPEC {
190    type Reader = R;
191}
192#[doc = "`write(|w| ..)` method takes [dma_c2control::W](W) writer structure"]
193impl crate::Writable for DMA_C2CONTROL_SPEC {
194    type Writer = W;
195    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
196    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
197}
198#[doc = "`reset()` method sets DMA_C2Control to value 0x0c48_9000"]
199impl crate::Resettable for DMA_C2CONTROL_SPEC {
200    const RESET_VALUE: Self::Ux = 0x0c48_9000;
201}
bl602_pac/dma/dma_c2control.rs

bl602_pac/dma/
dma_c2control.rs
