bl602_pac/rf/
vco1.rs

1#[doc = "Register `vco1` reader"]
2pub struct R(crate::R<VCO1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<VCO1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<VCO1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<VCO1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `vco1` writer"]
17pub struct W(crate::W<VCO1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<VCO1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<VCO1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<VCO1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `lo_vco_freq_cw` reader - "]
38pub type LO_VCO_FREQ_CW_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `lo_vco_freq_cw` writer - "]
40pub type LO_VCO_FREQ_CW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, VCO1_SPEC, u8, u8, 8, O>;
41#[doc = "Field `lo_vco_freq_cw_hw` reader - "]
42pub type LO_VCO_FREQ_CW_HW_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `lo_vco_freq_cw_hw` writer - "]
44pub type LO_VCO_FREQ_CW_HW_W<'a, const O: u8> =
45    crate::FieldWriter<'a, u32, VCO1_SPEC, u8, u8, 8, O>;
46#[doc = "Field `lo_vco_idac_cw` reader - "]
47pub type LO_VCO_IDAC_CW_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `lo_vco_idac_cw` writer - "]
49pub type LO_VCO_IDAC_CW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, VCO1_SPEC, u8, u8, 5, O>;
50#[doc = "Field `lo_vco_idac_cw_hw` reader - "]
51pub type LO_VCO_IDAC_CW_HW_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `lo_vco_idac_cw_hw` writer - "]
53pub type LO_VCO_IDAC_CW_HW_W<'a, const O: u8> =
54    crate::FieldWriter<'a, u32, VCO1_SPEC, u8, u8, 5, O>;
55impl R {
56    #[doc = "Bits 0:7"]
57    #[inline(always)]
58    pub fn lo_vco_freq_cw(&self) -> LO_VCO_FREQ_CW_R {
59        LO_VCO_FREQ_CW_R::new((self.bits & 0xff) as u8)
60    }
61    #[doc = "Bits 8:15"]
62    #[inline(always)]
63    pub fn lo_vco_freq_cw_hw(&self) -> LO_VCO_FREQ_CW_HW_R {
64        LO_VCO_FREQ_CW_HW_R::new(((self.bits >> 8) & 0xff) as u8)
65    }
66    #[doc = "Bits 16:20"]
67    #[inline(always)]
68    pub fn lo_vco_idac_cw(&self) -> LO_VCO_IDAC_CW_R {
69        LO_VCO_IDAC_CW_R::new(((self.bits >> 16) & 0x1f) as u8)
70    }
71    #[doc = "Bits 24:28"]
72    #[inline(always)]
73    pub fn lo_vco_idac_cw_hw(&self) -> LO_VCO_IDAC_CW_HW_R {
74        LO_VCO_IDAC_CW_HW_R::new(((self.bits >> 24) & 0x1f) as u8)
75    }
76}
77impl W {
78    #[doc = "Bits 0:7"]
79    #[inline(always)]
80    #[must_use]
81    pub fn lo_vco_freq_cw(&mut self) -> LO_VCO_FREQ_CW_W<0> {
82        LO_VCO_FREQ_CW_W::new(self)
83    }
84    #[doc = "Bits 8:15"]
85    #[inline(always)]
86    #[must_use]
87    pub fn lo_vco_freq_cw_hw(&mut self) -> LO_VCO_FREQ_CW_HW_W<8> {
88        LO_VCO_FREQ_CW_HW_W::new(self)
89    }
90    #[doc = "Bits 16:20"]
91    #[inline(always)]
92    #[must_use]
93    pub fn lo_vco_idac_cw(&mut self) -> LO_VCO_IDAC_CW_W<16> {
94        LO_VCO_IDAC_CW_W::new(self)
95    }
96    #[doc = "Bits 24:28"]
97    #[inline(always)]
98    #[must_use]
99    pub fn lo_vco_idac_cw_hw(&mut self) -> LO_VCO_IDAC_CW_HW_W<24> {
100        LO_VCO_IDAC_CW_HW_W::new(self)
101    }
102    #[doc = "Writes raw bits to the register."]
103    #[inline(always)]
104    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
105        self.0.bits(bits);
106        self
107    }
108}
109#[doc = "vco1.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vco1](index.html) module"]
110pub struct VCO1_SPEC;
111impl crate::RegisterSpec for VCO1_SPEC {
112    type Ux = u32;
113}
114#[doc = "`read()` method returns [vco1::R](R) reader structure"]
115impl crate::Readable for VCO1_SPEC {
116    type Reader = R;
117}
118#[doc = "`write(|w| ..)` method takes [vco1::W](W) writer structure"]
119impl crate::Writable for VCO1_SPEC {
120    type Writer = W;
121    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
122    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
123}
124#[doc = "`reset()` method sets vco1 to value 0"]
125impl crate::Resettable for VCO1_SPEC {
126    const RESET_VALUE: Self::Ux = 0;
127}
bl602_pac/rf/vco1.rs

bl602_pac/rf/
vco1.rs
