Struct Sim 

pub struct Sim { /* private fields */ }

Simulator state for one FrozenHir circuit.

Implementations

impl Sim

pub fn new(hir: FrozenHir) -> Self

pub fn with_engine(hir: FrozenHir, engine: TickEngine) -> Self

pub fn engine(&self) -> TickEngine

pub fn enable_vcd(&mut self, path: impl AsRef<Path>) -> Result<()>

pub fn enable_fst(&mut self, path: impl AsRef<Path>) -> Result<(), FstError>

Optional FST: still dumps VCD, then converts with vcd2fst (AD-24).

pub fn enable_fst_with( &mut self, path: impl AsRef<Path>, converter: impl AsRef<Path>, ) -> Result<(), FstError>

Same as enable_fst with an explicit converter (tests / RHDL_VCD2FST).

pub fn finish_waves(&mut self) -> Result<(), FstError>

Flush VCD and, if FST was requested, run the documented converter.

pub fn set_inputs(&mut self, inputs: PortValues)

pub fn ports(&self) -> &PortValues

pub fn tick(&mut self)

One rising edge of the module Clock (AD-15). Driven by FrozenHir assigns.

pub fn coverage_report(&self) -> String

pub fn coverage(&self) -> &Coverage

Borrow the live coverage recorder (FR105/FR109/FR114).

pub fn write_coverage_artifacts( &self, out_dir: &Path, ) -> Result<(PathBuf, PathBuf)>

Write FR114 coverage.lcov + coverage.html under out_dir.

pub fn register_fsm_states<I, S>(&mut self, fsm: &str, states: I)

where I: IntoIterator<Item = S>, S: Into<String>,

Register FSM state labels for FR109 / C3 state-visit coverage.

pub fn sample_state_visit(&mut self, fsm: &str, state: &str)

Record a visit to an FSM state (after Self::register_fsm_states).

pub fn settle(&mut self)

Recompute combinational nets from current ports/regs without a clock edge.

Use after Self::set_inputs when sequential logic samples same-cycle enables derived from inputs (e.g. wr_en && !full).