bender 0.31.0

A dependency management tool for hardware projects.
Documentation
# {{ HEADER_AUTOGEN }}
if [ info exists search_path ] {
    set search_path_initial $search_path
} else {
    set search_path_initial {}
}
set ROOT "{{ root }}"
{% if compilation_mode == 'separate' %}{% for group in srcs %}{% if group.file_type != '' %}{% if source_annotations %}
# {{ group.metadata }}{% endif %}
set search_path $search_path_initial
{% for incdir in group.incdirs %}lappend search_path "{{ incdir | replace(from=root, to='$ROOT') }}"
{% endfor %}set_db init_hdl_search_path $search_path

{% if group.file_type == 'verilog' %}read_hdl -language sv \
    {% elif group.file_type == 'vhdl' %}read_hdl -language vhdl \
    {% endif %}{% for define in group.defines %}{% if loop.first %}-define { \
        {% endif %}{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}{% if loop.last %} \
    } \
    {% else %} \
        {% endif %}{% endfor %}[list \
    {% for file in group.files %}{% if source_annotations %}{% if file.comment %}{{ '    ' }}# {{ file.comment }}
    {% endif %}{% endif %}{{ '    ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \
    {% endfor %}]
{% endif %}{% endfor %}
{% else %}{# compilation_mode == 'common' #}{% for file in all_verilog %}{% if loop.first %}set search_path $search_path_initial
{% for incdir in all_incdirs %}lappend search_path "$ROOT{{ incdir | replace(from=root, to='') }}"
{% endfor %}
set_db init_hdl_search_path $search_path

{% if abort_on_error %}if {[catch { {% endif %}read_hdl -language sv \
    {% for define in all_defines %}{% if loop.first %}-define { \
        {% endif %}{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}{% if loop.last %} \
    } \
    {% else %} \
        {% endif %}{% endfor %}[list \
    {% endif %}{% if source_annotations %}{% if file.comment %}{{ '    ' }}# {{ file.comment }}
    {% endif %}{% endif %}{{ '    ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \
    {% if loop.last %}]
{% if abort_on_error %}}]} {return 1}{% endif %}
{% endif %}{% endfor %}
{% for file in all_vhdl %}{% if loop.first %}
{% if abort_on_error %}if {[catch { {% endif %}read_hdl -language vhdl \
    [list \
    {% endif %}{% if source_annotations %}{% if file.comment %}{{ '    ' }}# {{ file.comment }}
    {% endif %}{% endif %}{{ '    ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \
    {% if loop.last %}]
{% if abort_on_error %}}]} {return 1}{% endif %}
{% endif %}{% endfor %}
{% endif %}set search_path $search_path_initial