bcm2835_lpa/
uart0.rs

1#[doc = r"Register block"]
2#[repr(C)]
3#[derive(Debug)]
4pub struct RegisterBlock {
5    dr: DR,
6    _reserved_1_ecr: [u8; 0x04],
7    _reserved2: [u8; 0x10],
8    fr: FR,
9    _reserved3: [u8; 0x08],
10    ibrd: IBRD,
11    fbrd: FBRD,
12    lcr_h: LCR_H,
13    cr: CR,
14    ifls: IFLS,
15    imsc: IMSC,
16    ris: RIS,
17    mis: MIS,
18    icr: ICR,
19    dmacr: DMACR,
20}
21impl RegisterBlock {
22    #[doc = "0x00 - Data Register"]
23    #[inline(always)]
24    pub const fn dr(&self) -> &DR {
25        &self.dr
26    }
27    #[doc = "0x04 - Error Clear Register"]
28    #[inline(always)]
29    pub const fn ecr(&self) -> &ECR {
30        unsafe { &*(self as *const Self).cast::<u8>().add(4).cast() }
31    }
32    #[doc = "0x04 - Receive Status Register"]
33    #[inline(always)]
34    pub const fn rsr(&self) -> &RSR {
35        unsafe { &*(self as *const Self).cast::<u8>().add(4).cast() }
36    }
37    #[doc = "0x18 - Flag Register"]
38    #[inline(always)]
39    pub const fn fr(&self) -> &FR {
40        &self.fr
41    }
42    #[doc = "0x24 - Integer Baud Rate Register"]
43    #[inline(always)]
44    pub const fn ibrd(&self) -> &IBRD {
45        &self.ibrd
46    }
47    #[doc = "0x28 - Fractional Baud Rate Register"]
48    #[inline(always)]
49    pub const fn fbrd(&self) -> &FBRD {
50        &self.fbrd
51    }
52    #[doc = "0x2c - Line Control Register"]
53    #[inline(always)]
54    pub const fn lcr_h(&self) -> &LCR_H {
55        &self.lcr_h
56    }
57    #[doc = "0x30 - Control Register"]
58    #[inline(always)]
59    pub const fn cr(&self) -> &CR {
60        &self.cr
61    }
62    #[doc = "0x34 - Interrupt FIFO Level Select Register"]
63    #[inline(always)]
64    pub const fn ifls(&self) -> &IFLS {
65        &self.ifls
66    }
67    #[doc = "0x38 - Interrupt Mask set_Clear Register"]
68    #[inline(always)]
69    pub const fn imsc(&self) -> &IMSC {
70        &self.imsc
71    }
72    #[doc = "0x3c - Raw Interrupt Status Register"]
73    #[inline(always)]
74    pub const fn ris(&self) -> &RIS {
75        &self.ris
76    }
77    #[doc = "0x40 - Masked Interrupt Status Register"]
78    #[inline(always)]
79    pub const fn mis(&self) -> &MIS {
80        &self.mis
81    }
82    #[doc = "0x44 - Interrupt Clear Register"]
83    #[inline(always)]
84    pub const fn icr(&self) -> &ICR {
85        &self.icr
86    }
87    #[doc = "0x48 - DMA Control Register"]
88    #[inline(always)]
89    pub const fn dmacr(&self) -> &DMACR {
90        &self.dmacr
91    }
92}
93#[doc = "DR (rw) register accessor: Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dr`]
94module"]
95pub type DR = crate::Reg<dr::DR_SPEC>;
96#[doc = "Data Register"]
97pub mod dr;
98#[doc = "RSR (r) register accessor: Receive Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rsr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsr`]
99module"]
100pub type RSR = crate::Reg<rsr::RSR_SPEC>;
101#[doc = "Receive Status Register"]
102pub mod rsr;
103#[doc = "ECR (w) register accessor: Error Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ecr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecr`]
104module"]
105pub type ECR = crate::Reg<ecr::ECR_SPEC>;
106#[doc = "Error Clear Register"]
107pub mod ecr;
108#[doc = "FR (rw) register accessor: Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fr`]
109module"]
110pub type FR = crate::Reg<fr::FR_SPEC>;
111#[doc = "Flag Register"]
112pub mod fr;
113#[doc = "IBRD (rw) register accessor: Integer Baud Rate Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ibrd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ibrd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibrd`]
114module"]
115pub type IBRD = crate::Reg<ibrd::IBRD_SPEC>;
116#[doc = "Integer Baud Rate Register"]
117pub mod ibrd;
118#[doc = "FBRD (rw) register accessor: Fractional Baud Rate Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fbrd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fbrd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fbrd`]
119module"]
120pub type FBRD = crate::Reg<fbrd::FBRD_SPEC>;
121#[doc = "Fractional Baud Rate Register"]
122pub mod fbrd;
123#[doc = "LCR_H (rw) register accessor: Line Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcr_h::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcr_h::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcr_h`]
124module"]
125pub type LCR_H = crate::Reg<lcr_h::LCR_H_SPEC>;
126#[doc = "Line Control Register"]
127pub mod lcr_h;
128#[doc = "CR (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`]
129module"]
130pub type CR = crate::Reg<cr::CR_SPEC>;
131#[doc = "Control Register"]
132pub mod cr;
133#[doc = "IFLS (rw) register accessor: Interrupt FIFO Level Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ifls::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ifls::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifls`]
134module"]
135pub type IFLS = crate::Reg<ifls::IFLS_SPEC>;
136#[doc = "Interrupt FIFO Level Select Register"]
137pub mod ifls;
138#[doc = "IMSC (rw) register accessor: Interrupt Mask set_Clear Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imsc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`imsc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imsc`]
139module"]
140pub type IMSC = crate::Reg<imsc::IMSC_SPEC>;
141#[doc = "Interrupt Mask set_Clear Register"]
142pub mod imsc;
143#[doc = "RIS (r) register accessor: Raw Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ris::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ris`]
144module"]
145pub type RIS = crate::Reg<ris::RIS_SPEC>;
146#[doc = "Raw Interrupt Status Register"]
147pub mod ris;
148#[doc = "MIS (r) register accessor: Masked Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mis::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mis`]
149module"]
150pub type MIS = crate::Reg<mis::MIS_SPEC>;
151#[doc = "Masked Interrupt Status Register"]
152pub mod mis;
153#[doc = "ICR (w) register accessor: Interrupt Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`]
154module"]
155pub type ICR = crate::Reg<icr::ICR_SPEC>;
156#[doc = "Interrupt Clear Register"]
157pub mod icr;
158#[doc = "DMACR (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmacr`]
159module"]
160pub type DMACR = crate::Reg<dmacr::DMACR_SPEC>;
161#[doc = "DMA Control Register"]
162pub mod dmacr;