bcm2711_lpa/emmc/
irpt_en.rs

1#[doc = "Register `IRPT_EN` reader"]
2pub type R = crate::R<IRPT_EN_SPEC>;
3#[doc = "Register `IRPT_EN` writer"]
4pub type W = crate::W<IRPT_EN_SPEC>;
5#[doc = "Field `CMD_DONE` reader - Command has finished"]
6pub type CMD_DONE_R = crate::BitReader;
7#[doc = "Field `CMD_DONE` writer - Command has finished"]
8pub type CMD_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DATA_DONE` reader - Data transfer has finished"]
10pub type DATA_DONE_R = crate::BitReader;
11#[doc = "Field `DATA_DONE` writer - Data transfer has finished"]
12pub type DATA_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `BLOCK_GAP` reader - Data transfer has stopped at block gap"]
14pub type BLOCK_GAP_R = crate::BitReader;
15#[doc = "Field `BLOCK_GAP` writer - Data transfer has stopped at block gap"]
16pub type BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `WRITE_RDY` reader - DATA can be written to"]
18pub type WRITE_RDY_R = crate::BitReader;
19#[doc = "Field `WRITE_RDY` writer - DATA can be written to"]
20pub type WRITE_RDY_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `READ_RDY` reader - DATA contains data to be read"]
22pub type READ_RDY_R = crate::BitReader;
23#[doc = "Field `READ_RDY` writer - DATA contains data to be read"]
24pub type READ_RDY_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CARD` reader - Card made interrupt request"]
26pub type CARD_R = crate::BitReader;
27#[doc = "Field `CARD` writer - Card made interrupt request"]
28pub type CARD_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `RETUNE` reader - Clock retune request"]
30pub type RETUNE_R = crate::BitReader;
31#[doc = "Field `RETUNE` writer - Clock retune request"]
32pub type RETUNE_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `BOOTACK` reader - Boot has been acknowledged"]
34pub type BOOTACK_R = crate::BitReader;
35#[doc = "Field `BOOTACK` writer - Boot has been acknowledged"]
36pub type BOOTACK_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `ENDBOOT` reader - Boot operation has terminated"]
38pub type ENDBOOT_R = crate::BitReader;
39#[doc = "Field `ENDBOOT` writer - Boot operation has terminated"]
40pub type ENDBOOT_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `CTO_ERR` reader - Command timeout"]
42pub type CTO_ERR_R = crate::BitReader;
43#[doc = "Field `CTO_ERR` writer - Command timeout"]
44pub type CTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `CCRC_ERR` reader - Command CRC error"]
46pub type CCRC_ERR_R = crate::BitReader;
47#[doc = "Field `CCRC_ERR` writer - Command CRC error"]
48pub type CCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `CEND_ERR` reader - Command end bit error (not 1)"]
50pub type CEND_ERR_R = crate::BitReader;
51#[doc = "Field `CEND_ERR` writer - Command end bit error (not 1)"]
52pub type CEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `CBAD_ERR` reader - Incorrect response command index"]
54pub type CBAD_ERR_R = crate::BitReader;
55#[doc = "Field `CBAD_ERR` writer - Incorrect response command index"]
56pub type CBAD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `DTO_ERR` reader - Data timeout"]
58pub type DTO_ERR_R = crate::BitReader;
59#[doc = "Field `DTO_ERR` writer - Data timeout"]
60pub type DTO_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `DCRC_ERR` reader - Data CRC error"]
62pub type DCRC_ERR_R = crate::BitReader;
63#[doc = "Field `DCRC_ERR` writer - Data CRC error"]
64pub type DCRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `DEND_ERR` reader - Data end bit error (not 1)"]
66pub type DEND_ERR_R = crate::BitReader;
67#[doc = "Field `DEND_ERR` writer - Data end bit error (not 1)"]
68pub type DEND_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `ACMD_ERR` reader - Auto command error"]
70pub type ACMD_ERR_R = crate::BitReader;
71#[doc = "Field `ACMD_ERR` writer - Auto command error"]
72pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
73impl R {
74    #[doc = "Bit 0 - Command has finished"]
75    #[inline(always)]
76    pub fn cmd_done(&self) -> CMD_DONE_R {
77        CMD_DONE_R::new((self.bits & 1) != 0)
78    }
79    #[doc = "Bit 1 - Data transfer has finished"]
80    #[inline(always)]
81    pub fn data_done(&self) -> DATA_DONE_R {
82        DATA_DONE_R::new(((self.bits >> 1) & 1) != 0)
83    }
84    #[doc = "Bit 2 - Data transfer has stopped at block gap"]
85    #[inline(always)]
86    pub fn block_gap(&self) -> BLOCK_GAP_R {
87        BLOCK_GAP_R::new(((self.bits >> 2) & 1) != 0)
88    }
89    #[doc = "Bit 4 - DATA can be written to"]
90    #[inline(always)]
91    pub fn write_rdy(&self) -> WRITE_RDY_R {
92        WRITE_RDY_R::new(((self.bits >> 4) & 1) != 0)
93    }
94    #[doc = "Bit 5 - DATA contains data to be read"]
95    #[inline(always)]
96    pub fn read_rdy(&self) -> READ_RDY_R {
97        READ_RDY_R::new(((self.bits >> 5) & 1) != 0)
98    }
99    #[doc = "Bit 8 - Card made interrupt request"]
100    #[inline(always)]
101    pub fn card(&self) -> CARD_R {
102        CARD_R::new(((self.bits >> 8) & 1) != 0)
103    }
104    #[doc = "Bit 12 - Clock retune request"]
105    #[inline(always)]
106    pub fn retune(&self) -> RETUNE_R {
107        RETUNE_R::new(((self.bits >> 12) & 1) != 0)
108    }
109    #[doc = "Bit 13 - Boot has been acknowledged"]
110    #[inline(always)]
111    pub fn bootack(&self) -> BOOTACK_R {
112        BOOTACK_R::new(((self.bits >> 13) & 1) != 0)
113    }
114    #[doc = "Bit 14 - Boot operation has terminated"]
115    #[inline(always)]
116    pub fn endboot(&self) -> ENDBOOT_R {
117        ENDBOOT_R::new(((self.bits >> 14) & 1) != 0)
118    }
119    #[doc = "Bit 16 - Command timeout"]
120    #[inline(always)]
121    pub fn cto_err(&self) -> CTO_ERR_R {
122        CTO_ERR_R::new(((self.bits >> 16) & 1) != 0)
123    }
124    #[doc = "Bit 17 - Command CRC error"]
125    #[inline(always)]
126    pub fn ccrc_err(&self) -> CCRC_ERR_R {
127        CCRC_ERR_R::new(((self.bits >> 17) & 1) != 0)
128    }
129    #[doc = "Bit 18 - Command end bit error (not 1)"]
130    #[inline(always)]
131    pub fn cend_err(&self) -> CEND_ERR_R {
132        CEND_ERR_R::new(((self.bits >> 18) & 1) != 0)
133    }
134    #[doc = "Bit 19 - Incorrect response command index"]
135    #[inline(always)]
136    pub fn cbad_err(&self) -> CBAD_ERR_R {
137        CBAD_ERR_R::new(((self.bits >> 19) & 1) != 0)
138    }
139    #[doc = "Bit 20 - Data timeout"]
140    #[inline(always)]
141    pub fn dto_err(&self) -> DTO_ERR_R {
142        DTO_ERR_R::new(((self.bits >> 20) & 1) != 0)
143    }
144    #[doc = "Bit 21 - Data CRC error"]
145    #[inline(always)]
146    pub fn dcrc_err(&self) -> DCRC_ERR_R {
147        DCRC_ERR_R::new(((self.bits >> 21) & 1) != 0)
148    }
149    #[doc = "Bit 22 - Data end bit error (not 1)"]
150    #[inline(always)]
151    pub fn dend_err(&self) -> DEND_ERR_R {
152        DEND_ERR_R::new(((self.bits >> 22) & 1) != 0)
153    }
154    #[doc = "Bit 24 - Auto command error"]
155    #[inline(always)]
156    pub fn acmd_err(&self) -> ACMD_ERR_R {
157        ACMD_ERR_R::new(((self.bits >> 24) & 1) != 0)
158    }
159}
160impl core::fmt::Debug for R {
161    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
162        f.debug_struct("IRPT_EN")
163            .field("acmd_err", &format_args!("{}", self.acmd_err().bit()))
164            .field("dend_err", &format_args!("{}", self.dend_err().bit()))
165            .field("dcrc_err", &format_args!("{}", self.dcrc_err().bit()))
166            .field("dto_err", &format_args!("{}", self.dto_err().bit()))
167            .field("cbad_err", &format_args!("{}", self.cbad_err().bit()))
168            .field("cend_err", &format_args!("{}", self.cend_err().bit()))
169            .field("ccrc_err", &format_args!("{}", self.ccrc_err().bit()))
170            .field("cto_err", &format_args!("{}", self.cto_err().bit()))
171            .field("endboot", &format_args!("{}", self.endboot().bit()))
172            .field("bootack", &format_args!("{}", self.bootack().bit()))
173            .field("retune", &format_args!("{}", self.retune().bit()))
174            .field("card", &format_args!("{}", self.card().bit()))
175            .field("read_rdy", &format_args!("{}", self.read_rdy().bit()))
176            .field("write_rdy", &format_args!("{}", self.write_rdy().bit()))
177            .field("block_gap", &format_args!("{}", self.block_gap().bit()))
178            .field("data_done", &format_args!("{}", self.data_done().bit()))
179            .field("cmd_done", &format_args!("{}", self.cmd_done().bit()))
180            .finish()
181    }
182}
183impl core::fmt::Debug for crate::generic::Reg<IRPT_EN_SPEC> {
184    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
185        core::fmt::Debug::fmt(&self.read(), f)
186    }
187}
188impl W {
189    #[doc = "Bit 0 - Command has finished"]
190    #[inline(always)]
191    #[must_use]
192    pub fn cmd_done(&mut self) -> CMD_DONE_W<IRPT_EN_SPEC> {
193        CMD_DONE_W::new(self, 0)
194    }
195    #[doc = "Bit 1 - Data transfer has finished"]
196    #[inline(always)]
197    #[must_use]
198    pub fn data_done(&mut self) -> DATA_DONE_W<IRPT_EN_SPEC> {
199        DATA_DONE_W::new(self, 1)
200    }
201    #[doc = "Bit 2 - Data transfer has stopped at block gap"]
202    #[inline(always)]
203    #[must_use]
204    pub fn block_gap(&mut self) -> BLOCK_GAP_W<IRPT_EN_SPEC> {
205        BLOCK_GAP_W::new(self, 2)
206    }
207    #[doc = "Bit 4 - DATA can be written to"]
208    #[inline(always)]
209    #[must_use]
210    pub fn write_rdy(&mut self) -> WRITE_RDY_W<IRPT_EN_SPEC> {
211        WRITE_RDY_W::new(self, 4)
212    }
213    #[doc = "Bit 5 - DATA contains data to be read"]
214    #[inline(always)]
215    #[must_use]
216    pub fn read_rdy(&mut self) -> READ_RDY_W<IRPT_EN_SPEC> {
217        READ_RDY_W::new(self, 5)
218    }
219    #[doc = "Bit 8 - Card made interrupt request"]
220    #[inline(always)]
221    #[must_use]
222    pub fn card(&mut self) -> CARD_W<IRPT_EN_SPEC> {
223        CARD_W::new(self, 8)
224    }
225    #[doc = "Bit 12 - Clock retune request"]
226    #[inline(always)]
227    #[must_use]
228    pub fn retune(&mut self) -> RETUNE_W<IRPT_EN_SPEC> {
229        RETUNE_W::new(self, 12)
230    }
231    #[doc = "Bit 13 - Boot has been acknowledged"]
232    #[inline(always)]
233    #[must_use]
234    pub fn bootack(&mut self) -> BOOTACK_W<IRPT_EN_SPEC> {
235        BOOTACK_W::new(self, 13)
236    }
237    #[doc = "Bit 14 - Boot operation has terminated"]
238    #[inline(always)]
239    #[must_use]
240    pub fn endboot(&mut self) -> ENDBOOT_W<IRPT_EN_SPEC> {
241        ENDBOOT_W::new(self, 14)
242    }
243    #[doc = "Bit 16 - Command timeout"]
244    #[inline(always)]
245    #[must_use]
246    pub fn cto_err(&mut self) -> CTO_ERR_W<IRPT_EN_SPEC> {
247        CTO_ERR_W::new(self, 16)
248    }
249    #[doc = "Bit 17 - Command CRC error"]
250    #[inline(always)]
251    #[must_use]
252    pub fn ccrc_err(&mut self) -> CCRC_ERR_W<IRPT_EN_SPEC> {
253        CCRC_ERR_W::new(self, 17)
254    }
255    #[doc = "Bit 18 - Command end bit error (not 1)"]
256    #[inline(always)]
257    #[must_use]
258    pub fn cend_err(&mut self) -> CEND_ERR_W<IRPT_EN_SPEC> {
259        CEND_ERR_W::new(self, 18)
260    }
261    #[doc = "Bit 19 - Incorrect response command index"]
262    #[inline(always)]
263    #[must_use]
264    pub fn cbad_err(&mut self) -> CBAD_ERR_W<IRPT_EN_SPEC> {
265        CBAD_ERR_W::new(self, 19)
266    }
267    #[doc = "Bit 20 - Data timeout"]
268    #[inline(always)]
269    #[must_use]
270    pub fn dto_err(&mut self) -> DTO_ERR_W<IRPT_EN_SPEC> {
271        DTO_ERR_W::new(self, 20)
272    }
273    #[doc = "Bit 21 - Data CRC error"]
274    #[inline(always)]
275    #[must_use]
276    pub fn dcrc_err(&mut self) -> DCRC_ERR_W<IRPT_EN_SPEC> {
277        DCRC_ERR_W::new(self, 21)
278    }
279    #[doc = "Bit 22 - Data end bit error (not 1)"]
280    #[inline(always)]
281    #[must_use]
282    pub fn dend_err(&mut self) -> DEND_ERR_W<IRPT_EN_SPEC> {
283        DEND_ERR_W::new(self, 22)
284    }
285    #[doc = "Bit 24 - Auto command error"]
286    #[inline(always)]
287    #[must_use]
288    pub fn acmd_err(&mut self) -> ACMD_ERR_W<IRPT_EN_SPEC> {
289        ACMD_ERR_W::new(self, 24)
290    }
291    #[doc = r" Writes raw bits to the register."]
292    #[doc = r""]
293    #[doc = r" # Safety"]
294    #[doc = r""]
295    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
296    #[inline(always)]
297    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
298        self.bits = bits;
299        self
300    }
301}
302#[doc = "Enable interrupt to core\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irpt_en::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irpt_en::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
303pub struct IRPT_EN_SPEC;
304impl crate::RegisterSpec for IRPT_EN_SPEC {
305    type Ux = u32;
306}
307#[doc = "`read()` method returns [`irpt_en::R`](R) reader structure"]
308impl crate::Readable for IRPT_EN_SPEC {}
309#[doc = "`write(|w| ..)` method takes [`irpt_en::W`](W) writer structure"]
310impl crate::Writable for IRPT_EN_SPEC {
311    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
312    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
313}
314#[doc = "`reset()` method sets IRPT_EN to value 0"]
315impl crate::Resettable for IRPT_EN_SPEC {
316    const RESET_VALUE: u32 = 0;
317}
bcm2711_lpa/emmc/irpt_en.rs

bcm2711_lpa/emmc/
irpt_en.rs
