bao1x_api/
udma.rs

1/// Constrain potential types for UDMA words to only what is representable and valid
2/// for the UDMA subsystem.
3pub trait UdmaWidths {}
4impl UdmaWidths for i8 {}
5impl UdmaWidths for u8 {}
6impl UdmaWidths for i16 {}
7impl UdmaWidths for u16 {}
8impl UdmaWidths for i32 {}
9impl UdmaWidths for u32 {}
10
11#[derive(Debug, Clone, Copy)]
12pub enum I2cChannel {
13    Channel0,
14    Channel1,
15    Channel2,
16    Channel3,
17}
18
19#[derive(Debug, Clone, Copy)]
20pub enum SpimChannel {
21    Channel0,
22    Channel1,
23    Channel2,
24    Channel3,
25}
26
27#[repr(u32)]
28#[derive(Copy, Clone, num_derive::FromPrimitive, Debug)]
29pub enum PeriphId {
30    Uart0 = 1 << 0,
31    Uart1 = 1 << 1,
32    Uart2 = 1 << 2,
33    Uart3 = 1 << 3,
34    Spim0 = 1 << 4,
35    Spim1 = 1 << 5,
36    Spim2 = 1 << 6,
37    Spim3 = 1 << 7,
38    I2c0 = 1 << 8,
39    I2c1 = 1 << 9,
40    I2c2 = 1 << 10,
41    I2c3 = 1 << 11,
42    Sdio = 1 << 12,
43    I2s = 1 << 13,
44    Cam = 1 << 14,
45    Filter = 1 << 15,
46    Scif = 1 << 16,
47    Spis0 = 1 << 17,
48    Spis1 = 1 << 18,
49    Adc = 1 << 19,
50}
51impl Into<u32> for PeriphId {
52    fn into(self) -> u32 { self as u32 }
53}
54
55impl From<SpimChannel> for PeriphId {
56    fn from(value: SpimChannel) -> Self {
57        match value {
58            SpimChannel::Channel0 => PeriphId::Spim0,
59            SpimChannel::Channel1 => PeriphId::Spim1,
60            SpimChannel::Channel2 => PeriphId::Spim2,
61            SpimChannel::Channel3 => PeriphId::Spim3,
62        }
63    }
64}
65
66impl From<I2cChannel> for PeriphId {
67    fn from(value: I2cChannel) -> Self {
68        match value {
69            I2cChannel::Channel0 => PeriphId::I2c0,
70            I2cChannel::Channel1 => PeriphId::I2c1,
71            I2cChannel::Channel2 => PeriphId::I2c2,
72            I2cChannel::Channel3 => PeriphId::I2c3,
73        }
74    }
75}
76
77#[repr(u32)]
78#[derive(Copy, Clone)]
79pub enum PeriphEventId {
80    Uart0 = 0,
81    Uart1 = 4,
82    Uart2 = 8,
83    Uart3 = 12,
84    Spim0 = 16,
85    Spim1 = 20,
86    Spim2 = 24,
87    Spim3 = 28,
88    I2c0 = 32,
89    I2c1 = 36,
90    I2c2 = 40,
91    I2c3 = 44,
92    Sdio = 48,
93    I2s = 52,
94    Cam = 56,
95    Adc = 57, // note exception to ordering here
96    Filter = 60,
97    Scif = 64,
98    Spis0 = 68,
99    Spis1 = 72,
100}
101impl From<PeriphId> for PeriphEventId {
102    fn from(id: PeriphId) -> Self {
103        match id {
104            PeriphId::Uart0 => PeriphEventId::Uart0,
105            PeriphId::Uart1 => PeriphEventId::Uart1,
106            PeriphId::Uart2 => PeriphEventId::Uart2,
107            PeriphId::Uart3 => PeriphEventId::Uart3,
108            PeriphId::Spim0 => PeriphEventId::Spim0,
109            PeriphId::Spim1 => PeriphEventId::Spim1,
110            PeriphId::Spim2 => PeriphEventId::Spim2,
111            PeriphId::Spim3 => PeriphEventId::Spim3,
112            PeriphId::I2c0 => PeriphEventId::I2c0,
113            PeriphId::I2c1 => PeriphEventId::I2c1,
114            PeriphId::I2c2 => PeriphEventId::I2c2,
115            PeriphId::I2c3 => PeriphEventId::I2c3,
116            PeriphId::Sdio => PeriphEventId::Sdio,
117            PeriphId::I2s => PeriphEventId::I2s,
118            PeriphId::Cam => PeriphEventId::Cam,
119            PeriphId::Filter => PeriphEventId::Filter,
120            PeriphId::Scif => PeriphEventId::Scif,
121            PeriphId::Spis0 => PeriphEventId::Spis0,
122            PeriphId::Spis1 => PeriphEventId::Spis1,
123            PeriphId::Adc => PeriphEventId::Adc,
124        }
125    }
126}
127#[repr(u32)]
128#[derive(Copy, Clone)]
129pub enum EventUartOffset {
130    Rx = 0,
131    Tx = 1,
132    RxChar = 2,
133    Err = 3,
134}
135#[repr(u32)]
136#[derive(Copy, Clone)]
137pub enum EventSpimOffset {
138    Rx = 0,
139    Tx = 1,
140    Cmd = 2,
141    Eot = 3,
142}
143#[repr(u32)]
144#[derive(Copy, Clone)]
145pub enum EventI2cOffset {
146    Rx = 0,
147    Tx = 1,
148    Cmd = 2,
149    Eot = 3,
150}
151#[repr(u32)]
152#[derive(Copy, Clone)]
153pub enum EventSdioOffset {
154    Rx = 0,
155    Tx = 1,
156    Eot = 2,
157    Err = 3,
158}
159#[repr(u32)]
160#[derive(Copy, Clone)]
161pub enum EventI2sOffset {
162    Rx = 0,
163    Tx = 1,
164}
165#[repr(u32)]
166#[derive(Copy, Clone)]
167pub enum EventCamOffset {
168    Rx = 0,
169}
170#[repr(u32)]
171#[derive(Copy, Clone)]
172pub enum EventAdcOffset {
173    Rx = 0,
174}
175#[repr(u32)]
176#[derive(Copy, Clone)]
177pub enum EventFilterOffset {
178    Eot = 0,
179    Active = 1,
180}
181#[repr(u32)]
182#[derive(Copy, Clone)]
183
184pub enum EventScifOffset {
185    Rx = 0,
186    Tx = 1,
187    RxChar = 2,
188    Err = 3,
189}
190#[repr(u32)]
191#[derive(Copy, Clone)]
192pub enum EventSpisOffset {
193    Rx = 0,
194    Tx = 1,
195    Eot = 2,
196}
197#[derive(Copy, Clone)]
198pub enum PeriphEventType {
199    Uart(EventUartOffset),
200    Spim(EventSpimOffset),
201    I2c(EventI2cOffset),
202    Sdio(EventSdioOffset),
203    I2s(EventI2sOffset),
204    Cam(EventCamOffset),
205    Adc(EventAdcOffset),
206    Filter(EventFilterOffset),
207    Scif(EventScifOffset),
208    Spis(EventSpisOffset),
209}
210impl Into<u32> for PeriphEventType {
211    fn into(self) -> u32 {
212        match self {
213            PeriphEventType::Uart(t) => t as u32,
214            PeriphEventType::Spim(t) => t as u32,
215            PeriphEventType::I2c(t) => t as u32,
216            PeriphEventType::Sdio(t) => t as u32,
217            PeriphEventType::I2s(t) => t as u32,
218            PeriphEventType::Cam(t) => t as u32,
219            PeriphEventType::Adc(t) => t as u32,
220            PeriphEventType::Filter(t) => t as u32,
221            PeriphEventType::Scif(t) => t as u32,
222            PeriphEventType::Spis(t) => t as u32,
223        }
224    }
225}
226
227#[repr(u32)]
228#[derive(Debug, Copy, Clone, num_derive::FromPrimitive)]
229pub enum EventChannel {
230    Channel0 = 0,
231    Channel1 = 8,
232    Channel2 = 16,
233    Channel3 = 24,
234}
235
236#[derive(Debug, Copy, Clone, num_derive::FromPrimitive)]
237pub enum IrqBank {
238    I2c,
239    I2cErr,
240}
241
242/// Use a trait that will allow us to share code between both `std` and `no-std` implementations
243pub trait UdmaGlobalConfig {
244    fn clock(&self, peripheral: PeriphId, enable: bool);
245    unsafe fn udma_event_map(
246        &self,
247        peripheral: PeriphId,
248        event_type: PeriphEventType,
249        to_channel: EventChannel,
250    );
251    fn reset(&self, peripheral: PeriphId);
252    fn irq_status_bits(&self, bank: IrqBank) -> u32;
253}
bao1x_api/udma.rs

bao1x_api/
udma.rs
