axess-cache
DST-friendly local hot-path cache primitives for Axess.
All time-dependent decisions go through an injected Clock from axess-clock, so TTL eviction is reproducible under MockClock; the cache layer doesn't fight the rest of the workspace's deterministic-simulation posture.
The flagship type is ClockTtlCache<K, V>; a TTL + LRU cache that replaces moka in any code path where DST or compliance forbids wall-clock background tasks. Used internally as the Cedar authz entity cache, but generic enough to wrap any adopter computation.
Usage
use ClockTtlCache;
use SystemClock;
use ;
let cache: = builder
.capacity
.ttl
.clock
.build;
cache.put;
let v = cache.get;
Features
- TTL + LRU with bounded capacity.
- Single-flight via
OnceCellso concurrent misses for the same key share a single computation. invalidate_by(predicate)for scoped invalidation (per-principal, per-tenant) without scanning the whole cache.- Snapshotted
CacheStats(hits, misses, evictions, invalidations) for periodic metric flush.
Licence
Dual-licensed under MIT and Apache-2.0.