ax_cpu/
uspace_common.rs

1use ax_memory_addr::VirtAddr;
2
3use crate::{trap::PageFaultFlags, uspace::ExceptionInfo};
4
5/// A reason as to why the control of the CPU is returned from
6/// the user space to the kernel.
7#[derive(Debug, Clone, Copy)]
8pub enum ReturnReason {
9    /// An interrupt.
10    Interrupt,
11    /// A system call.
12    Syscall,
13    /// A page fault.
14    PageFault(VirtAddr, PageFaultFlags),
15    /// Other kinds of exceptions.
16    Exception(ExceptionInfo),
17    /// Unknown reason.
18    Unknown,
19}
20
21/// A generalized kind for [`ExceptionInfo`].
22#[derive(Debug, Clone, Copy, PartialEq, Eq)]
23pub enum ExceptionKind {
24    #[cfg(target_arch = "x86_64")]
25    /// A debug exception.
26    Debug,
27    /// A breakpoint exception.
28    Breakpoint,
29    /// An illegal instruction exception.
30    IllegalInstruction,
31    /// A misaligned access exception.
32    Misaligned,
33    /// An integer arithmetic exception, i.e. x86 `#DE` (divide-by-zero or the
34    /// `INT_MIN / -1` overflow). On x86 this is a real CPU trap that must become
35    /// `SIGFPE`; the other architectures do not trap on integer divide-by-zero,
36    /// so they never produce this kind.
37    ArithmeticError,
38    /// Other kinds of exceptions.
39    Other,
40}
41
42/// Architecture-neutral syndrome fields for user-space exceptions.
43///
44/// The meaning of each field remains architecture-specific, but this shape
45/// gives OS code a single way to log or forward the raw trap details without
46/// reaching into every architecture's private register type.
47#[derive(Debug, Clone, Copy, Default, PartialEq, Eq)]
48pub struct ExceptionSyndrome {
49    /// Raw syndrome/status register value when the architecture exposes one.
50    pub raw: u64,
51    /// Primary exception class or code.
52    pub class: u64,
53    /// Architecture-specific instruction syndrome or subcode.
54    pub iss: u64,
55}
ax_cpu/uspace_common.rs

ax_cpu/
uspace_common.rs
