avr-device 0.2.3

Register access crate for AVR microcontrollers
Documentation 
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#[doc = "Register `PCIFR` reader"]
pub struct R(crate::R<PCIFR_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<PCIFR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<PCIFR_SPEC>> for R {
    fn from(reader: crate::R<PCIFR_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Field `PCIF0` reader - Pin Change Interrupt Flag 0"]
pub struct PCIF0_R(crate::FieldReader<bool, bool>);
impl PCIF0_R {
    pub(crate) fn new(bits: bool) -> Self {
        PCIF0_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for PCIF0_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl R {
    #[doc = "Bit 0 - Pin Change Interrupt Flag 0"]
    #[inline(always)]
    pub fn pcif0(&self) -> PCIF0_R {
        PCIF0_R::new((self.bits & 0x01) != 0)
    }
}
#[doc = "Pin Change Interrupt Flag Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcifr](index.html) module"]
pub struct PCIFR_SPEC;
impl crate::RegisterSpec for PCIFR_SPEC {
    type Ux = u8;
}
#[doc = "`read()` method returns [pcifr::R](R) reader structure"]
impl crate::Readable for PCIFR_SPEC {
    type Reader = R;
}
#[doc = "`reset()` method sets PCIFR to value 0"]
impl crate::Resettable for PCIFR_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}