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#[doc = "Reader of register UCSR3B"]
pub type R = crate::R<u8, super::UCSR3B>;
#[doc = "Writer for register UCSR3B"]
pub type W = crate::W<u8, super::UCSR3B>;
#[doc = "Register UCSR3B `reset()`'s with value 0"]
impl crate::ResetValue for super::UCSR3B {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
#[doc = "Reader of field `TXB83`"]
pub type TXB83_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TXB83`"]
pub struct TXB83_W<'a> {
    w: &'a mut W,
}
impl<'a> TXB83_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
        self.w
    }
}
#[doc = "Reader of field `RXB83`"]
pub type RXB83_R = crate::R<bool, bool>;
#[doc = "Reader of field `UCSZ32`"]
pub type UCSZ32_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `UCSZ32`"]
pub struct UCSZ32_W<'a> {
    w: &'a mut W,
}
impl<'a> UCSZ32_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
        self.w
    }
}
#[doc = "Reader of field `TXEN3`"]
pub type TXEN3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TXEN3`"]
pub struct TXEN3_W<'a> {
    w: &'a mut W,
}
impl<'a> TXEN3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u8) & 0x01) << 3);
        self.w
    }
}
#[doc = "Reader of field `RXEN3`"]
pub type RXEN3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RXEN3`"]
pub struct RXEN3_W<'a> {
    w: &'a mut W,
}
impl<'a> RXEN3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u8) & 0x01) << 4);
        self.w
    }
}
#[doc = "Reader of field `UDRIE3`"]
pub type UDRIE3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `UDRIE3`"]
pub struct UDRIE3_W<'a> {
    w: &'a mut W,
}
impl<'a> UDRIE3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u8) & 0x01) << 5);
        self.w
    }
}
#[doc = "Reader of field `TXCIE3`"]
pub type TXCIE3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TXCIE3`"]
pub struct TXCIE3_W<'a> {
    w: &'a mut W,
}
impl<'a> TXCIE3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6);
        self.w
    }
}
#[doc = "Reader of field `RXCIE3`"]
pub type RXCIE3_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RXCIE3`"]
pub struct RXCIE3_W<'a> {
    w: &'a mut W,
}
impl<'a> RXCIE3_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
        self.w
    }
}
impl R {
    #[doc = "Bit 0 - Transmit Data Bit 8"]
    #[inline(always)]
    pub fn txb83(&self) -> TXB83_R {
        TXB83_R::new((self.bits & 0x01) != 0)
    }
    #[doc = "Bit 1 - Receive Data Bit 8"]
    #[inline(always)]
    pub fn rxb83(&self) -> RXB83_R {
        RXB83_R::new(((self.bits >> 1) & 0x01) != 0)
    }
    #[doc = "Bit 2 - Character Size"]
    #[inline(always)]
    pub fn ucsz32(&self) -> UCSZ32_R {
        UCSZ32_R::new(((self.bits >> 2) & 0x01) != 0)
    }
    #[doc = "Bit 3 - Transmitter Enable"]
    #[inline(always)]
    pub fn txen3(&self) -> TXEN3_R {
        TXEN3_R::new(((self.bits >> 3) & 0x01) != 0)
    }
    #[doc = "Bit 4 - Receiver Enable"]
    #[inline(always)]
    pub fn rxen3(&self) -> RXEN3_R {
        RXEN3_R::new(((self.bits >> 4) & 0x01) != 0)
    }
    #[doc = "Bit 5 - USART Data register Empty Interrupt Enable"]
    #[inline(always)]
    pub fn udrie3(&self) -> UDRIE3_R {
        UDRIE3_R::new(((self.bits >> 5) & 0x01) != 0)
    }
    #[doc = "Bit 6 - TX Complete Interrupt Enable"]
    #[inline(always)]
    pub fn txcie3(&self) -> TXCIE3_R {
        TXCIE3_R::new(((self.bits >> 6) & 0x01) != 0)
    }
    #[doc = "Bit 7 - RX Complete Interrupt Enable"]
    #[inline(always)]
    pub fn rxcie3(&self) -> RXCIE3_R {
        RXCIE3_R::new(((self.bits >> 7) & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - Transmit Data Bit 8"]
    #[inline(always)]
    pub fn txb83(&mut self) -> TXB83_W {
        TXB83_W { w: self }
    }
    #[doc = "Bit 2 - Character Size"]
    #[inline(always)]
    pub fn ucsz32(&mut self) -> UCSZ32_W {
        UCSZ32_W { w: self }
    }
    #[doc = "Bit 3 - Transmitter Enable"]
    #[inline(always)]
    pub fn txen3(&mut self) -> TXEN3_W {
        TXEN3_W { w: self }
    }
    #[doc = "Bit 4 - Receiver Enable"]
    #[inline(always)]
    pub fn rxen3(&mut self) -> RXEN3_W {
        RXEN3_W { w: self }
    }
    #[doc = "Bit 5 - USART Data register Empty Interrupt Enable"]
    #[inline(always)]
    pub fn udrie3(&mut self) -> UDRIE3_W {
        UDRIE3_W { w: self }
    }
    #[doc = "Bit 6 - TX Complete Interrupt Enable"]
    #[inline(always)]
    pub fn txcie3(&mut self) -> TXCIE3_W {
        TXCIE3_W { w: self }
    }
    #[doc = "Bit 7 - RX Complete Interrupt Enable"]
    #[inline(always)]
    pub fn rxcie3(&mut self) -> RXCIE3_W {
        RXCIE3_W { w: self }
    }
}