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#[doc = "Reader of register ADMUX"] pub type R = crate::R<u8, super::ADMUX>; #[doc = "Writer for register ADMUX"] pub type W = crate::W<u8, super::ADMUX>; #[doc = "Register ADMUX `reset()`'s with value 0"] impl crate::ResetValue for super::ADMUX { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } #[doc = "Reader of field `MUX`"] pub type MUX_R = crate::R<u8, u8>; #[doc = "Write proxy for field `MUX`"] pub struct MUX_W<'a> { w: &'a mut W, } impl<'a> MUX_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | ((value as u8) & 0x1f); self.w } } #[doc = "Reader of field `ADLAR`"] pub type ADLAR_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADLAR`"] pub struct ADLAR_W<'a> { w: &'a mut W, } impl<'a> ADLAR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u8) & 0x01) << 5); self.w } } #[doc = "Reference Selection Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum REFS_A { #[doc = "0: Aref Internal Vref turned off"] AREF = 0, #[doc = "1: AVcc with external capacitor at AREF pin"] AVCC = 1, #[doc = "3: Internal 1.1V Voltage Reference with external capacitor at AREF pin"] INTERNAL = 3, } impl From<REFS_A> for u8 { #[inline(always)] fn from(variant: REFS_A) -> Self { variant as _ } } #[doc = "Reader of field `REFS`"] pub type REFS_R = crate::R<u8, REFS_A>; impl REFS_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, REFS_A> { use crate::Variant::*; match self.bits { 0 => Val(REFS_A::AREF), 1 => Val(REFS_A::AVCC), 3 => Val(REFS_A::INTERNAL), i => Res(i), } } #[doc = "Checks if the value of the field is `AREF`"] #[inline(always)] pub fn is_aref(&self) -> bool { *self == REFS_A::AREF } #[doc = "Checks if the value of the field is `AVCC`"] #[inline(always)] pub fn is_avcc(&self) -> bool { *self == REFS_A::AVCC } #[doc = "Checks if the value of the field is `INTERNAL`"] #[inline(always)] pub fn is_internal(&self) -> bool { *self == REFS_A::INTERNAL } } #[doc = "Write proxy for field `REFS`"] pub struct REFS_W<'a> { w: &'a mut W, } impl<'a> REFS_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: REFS_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Aref Internal Vref turned off"] #[inline(always)] pub fn aref(self) -> &'a mut W { self.variant(REFS_A::AREF) } #[doc = "AVcc with external capacitor at AREF pin"] #[inline(always)] pub fn avcc(self) -> &'a mut W { self.variant(REFS_A::AVCC) } #[doc = "Internal 1.1V Voltage Reference with external capacitor at AREF pin"] #[inline(always)] pub fn internal(self) -> &'a mut W { self.variant(REFS_A::INTERNAL) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u8) & 0x03) << 6); self.w } } impl R { #[doc = "Bits 0:4 - Analog Channel and Gain Selection Bits"] #[inline(always)] pub fn mux(&self) -> MUX_R { MUX_R::new((self.bits & 0x1f) as u8) } #[doc = "Bit 5 - Left Adjust Result"] #[inline(always)] pub fn adlar(&self) -> ADLAR_R { ADLAR_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bits 6:7 - Reference Selection Bits"] #[inline(always)] pub fn refs(&self) -> REFS_R { REFS_R::new(((self.bits >> 6) & 0x03) as u8) } } impl W { #[doc = "Bits 0:4 - Analog Channel and Gain Selection Bits"] #[inline(always)] pub fn mux(&mut self) -> MUX_W { MUX_W { w: self } } #[doc = "Bit 5 - Left Adjust Result"] #[inline(always)] pub fn adlar(&mut self) -> ADLAR_W { ADLAR_W { w: self } } #[doc = "Bits 6:7 - Reference Selection Bits"] #[inline(always)] pub fn refs(&mut self) -> REFS_W { REFS_W { w: self } } }