autd3_driver/datagram/modulation/
mod.rs

1mod boxed;
2
3pub use boxed::BoxedModulation;
4
5#[cfg(test)]
6pub mod tests {
7    use std::num::NonZeroU16;
8
9    use autd3_core::derive::*;
10
11    use crate::datagram::{
12        with_loop_behavior::WithFiniteLoopInspectionResult,
13        with_segment::WithSegmentInspectionResult,
14    };
15
16    #[derive(Modulation, Clone, PartialEq, Debug)]
17    pub struct TestModulation {
18        pub sampling_config: SamplingConfig,
19    }
20
21    impl Modulation for TestModulation {
22        fn calc(self) -> Result<Vec<u8>, ModulationError> {
23            Ok(vec![0; 2])
24        }
25
26        fn sampling_config(&self) -> SamplingConfig {
27            self.sampling_config
28        }
29    }
30
31    #[test]
32    fn inspect() -> Result<(), Box<dyn std::error::Error>> {
33        let geometry = crate::tests::create_geometry(2);
34
35        TestModulation {
36            sampling_config: SamplingConfig::FREQ_4K,
37        }
38        .inspect(&geometry, &Environment::default(), &DeviceMask::AllEnabled)?
39        .iter()
40        .for_each(|r| {
41            assert_eq!(
42                &Some(ModulationInspectionResult {
43                    data: vec![0, 0],
44                    config: SamplingConfig::FREQ_4K,
45                }),
46                r
47            );
48        });
49
50        Ok(())
51    }
52
53    #[test]
54    fn inspect_with_segment() -> Result<(), Box<dyn std::error::Error>> {
55        let geometry = crate::tests::create_geometry(2);
56
57        crate::datagram::WithSegment {
58            inner: TestModulation {
59                sampling_config: SamplingConfig::FREQ_4K,
60            },
61            segment: Segment::S1,
62            transition_mode: transition_mode::Later,
63        }
64        .inspect(&geometry, &Environment::default(), &DeviceMask::AllEnabled)?
65        .iter()
66        .for_each(|r| {
67            assert_eq!(
68                &Some(WithSegmentInspectionResult {
69                    inner: ModulationInspectionResult {
70                        data: vec![0, 0],
71                        config: SamplingConfig::FREQ_4K,
72                    },
73                    segment: Segment::S1,
74                    transition_mode: transition_mode::Later,
75                }),
76                r
77            );
78        });
79
80        Ok(())
81    }
82
83    #[test]
84    fn inspect_with_loop_behavior() -> Result<(), Box<dyn std::error::Error>> {
85        let geometry = crate::tests::create_geometry(2);
86
87        crate::datagram::WithFiniteLoop {
88            inner: TestModulation {
89                sampling_config: SamplingConfig::FREQ_4K,
90            },
91            segment: Segment::S1,
92            transition_mode: transition_mode::SyncIdx,
93            loop_count: NonZeroU16::MIN,
94        }
95        .inspect(&geometry, &Environment::default(), &DeviceMask::AllEnabled)?
96        .iter()
97        .for_each(|r| {
98            assert_eq!(
99                &Some(WithFiniteLoopInspectionResult {
100                    inner: ModulationInspectionResult {
101                        data: vec![0, 0],
102                        config: SamplingConfig::FREQ_4K,
103                    },
104                    segment: Segment::S1,
105                    transition_mode: transition_mode::SyncIdx,
106                    loop_count: NonZeroU16::MIN,
107                }),
108                r
109            );
110        });
111
112        Ok(())
113    }
114}
autd3_driver/datagram/modulation/mod.rs

autd3_driver/datagram/modulation/
mod.rs
