1use derive_more::{Debug, Display};
2use itertools::Itertools;
3
4#[derive(Debug, Clone, Copy, PartialEq, Eq, Display)]
6pub struct Major(pub u8);
7
8#[derive(Debug, Clone, Copy, PartialEq, Eq, Display)]
10pub struct Minor(pub u8);
11
12#[must_use]
13fn version_map(major: Major, minor: Minor) -> String {
14 let major = major.0;
15 let minor = minor.0;
16 match major {
17 0 => "older than v0.4".to_string(),
18 0x01..=0x06 => format!("v0.{}", major + 3),
19 0x0A..=0x15 => format!("v1.{}", major - 0x0A),
20 0x80..=0x89 => format!("v2.{}.{}", major - 0x80, minor),
21 0x8A..=0x8A => format!("v3.{}.{}", major - 0x8A, minor),
22 0x8B..=0x8C => format!("v4.{}.{}", major - 0x8B, minor),
23 0x8D..=0x8E => format!("v5.{}.{}", major - 0x8D, minor),
24 0x8F..=0x90 => format!("v6.{}.{}", major - 0x8F, minor),
25 0x91..=0x91 => format!("v7.{}.{}", major - 0x91, minor),
26 0x92..=0x92 => format!("v8.{}.{}", major - 0x92, minor),
27 0xA0..=0xA1 => format!("v9.{}.{}", major - 0xA0, minor),
28 0xA2..=0xA2 => format!("v10.{}.{}", major - 0xA2, minor),
29 0xA3..=0xA3 => format!("v11.{}.{}", major - 0xA3, minor),
30 _ => format!("unknown ({major})"),
31 }
32}
33
34#[derive(Debug, Clone, Copy, PartialEq, Eq)]
36pub struct FPGAVersion {
37 #[doc(hidden)]
38 pub major: Major,
39 #[doc(hidden)]
40 pub minor: Minor,
41 #[doc(hidden)]
42 pub function_bits: u8,
43}
44
45impl FPGAVersion {
46 #[doc(hidden)]
47 pub const ENABLED_EMULATOR_BIT: u8 = 1 << 7;
48
49 #[doc(hidden)]
50 #[must_use]
51 pub const fn is_emulator(&self) -> bool {
52 (self.function_bits & Self::ENABLED_EMULATOR_BIT) == Self::ENABLED_EMULATOR_BIT
53 }
54}
55
56impl std::fmt::Display for FPGAVersion {
57 fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
58 write!(f, "{}", version_map(self.major, self.minor))?;
59 let features = [self.is_emulator().then_some("Emulator")]
60 .iter()
61 .filter_map(Option::as_ref)
62 .join(", ");
63 if !features.is_empty() {
64 write!(f, " [{}]", features)?;
65 }
66 Ok(())
67 }
68}
69
70#[derive(Debug, Clone, Copy, PartialEq, Eq, Display)]
72#[display("{}", version_map(self.major, self.minor))]
73pub struct CPUVersion {
74 #[doc(hidden)]
75 pub major: Major,
76 #[doc(hidden)]
77 pub minor: Minor,
78}
79
80#[derive(Debug, Clone, Copy, PartialEq, Eq, Display)]
82#[display(
83 "{}: CPU = {}, FPGA = {}",
84 idx,
85 self.cpu,
86 self.fpga,
87)]
88#[debug("{}", self)]
89pub struct FirmwareVersion {
90 #[doc(hidden)]
91 pub idx: usize,
92 #[doc(hidden)]
93 pub cpu: CPUVersion,
94 #[doc(hidden)]
95 pub fpga: FPGAVersion,
96}
97
98impl FirmwareVersion {
99 #[doc(hidden)]
100 pub const LATEST_VERSION_NUM_MAJOR: Major = Major(0xA3);
101 #[doc(hidden)]
102 pub const LATEST_VERSION_NUM_MINOR: Minor = Minor(0x00);
103
104 #[doc(hidden)]
105 #[must_use]
106 pub const fn is_emulator(&self) -> bool {
107 self.fpga.is_emulator()
108 }
109
110 #[must_use]
112 pub fn latest() -> String {
113 version_map(
114 Self::LATEST_VERSION_NUM_MAJOR,
115 Self::LATEST_VERSION_NUM_MINOR,
116 )
117 }
118}
119
120#[cfg(test)]
121mod tests {
122 use super::*;
123
124 #[rstest::rstest]
125 #[test]
126 #[case("older than v0.4", 0)]
127 #[case("v0.4", 1)]
128 #[case("v0.5", 2)]
129 #[case("v0.6", 3)]
130 #[case("v0.7", 4)]
131 #[case("v0.8", 5)]
132 #[case("v0.9", 6)]
133 #[case("unknown (7)", 7)]
134 #[case("unknown (8)", 8)]
135 #[case("unknown (9)", 9)]
136 #[case("v1.0", 10)]
137 #[case("v1.1", 11)]
138 #[case("v1.2", 12)]
139 #[case("v1.3", 13)]
140 #[case("v1.4", 14)]
141 #[case("v1.5", 15)]
142 #[case("v1.6", 16)]
143 #[case("v1.7", 17)]
144 #[case("v1.8", 18)]
145 #[case("v1.9", 19)]
146 #[case("v1.10", 20)]
147 #[case("v1.11", 21)]
148 #[case("v2.0.0", 128)]
149 #[case("v2.1.0", 129)]
150 #[case("v2.2.0", 130)]
151 #[case("v2.3.0", 131)]
152 #[case("v2.4.0", 132)]
153 #[case("v2.5.0", 133)]
154 #[case("v2.6.0", 134)]
155 #[case("v2.7.0", 135)]
156 #[case("v2.8.0", 136)]
157 #[case("v2.9.0", 137)]
158 #[case("v3.0.0", 138)]
159 #[case("v4.0.0", 139)]
160 #[case("v4.1.0", 140)]
161 #[case("v5.0.0", 141)]
162 #[case("v5.1.0", 142)]
163 #[case("v6.0.0", 143)]
164 #[case("v6.1.0", 144)]
165 #[case("v7.0.0", 145)]
166 #[case("v8.0.0", 146)]
167 #[case("v9.0.0", 160)]
168 #[case("v9.1.0", 161)]
169 #[case("v10.0.0", 162)]
170 #[case("v11.0.0", 163)]
171 #[case("unknown (147)", 147)]
172 fn version(#[case] expected: &str, #[case] num: u8) {
173 let info = FirmwareVersion {
174 idx: 0,
175 cpu: CPUVersion {
176 major: Major(num),
177 minor: Minor(0),
178 },
179 fpga: FPGAVersion {
180 major: Major(num),
181 minor: Minor(0),
182 function_bits: 0,
183 },
184 };
185 assert_eq!(expected, info.cpu.to_string());
186 assert_eq!(expected, info.fpga.to_string());
187 }
188
189 #[test]
190 fn latest() {
191 assert_eq!("v11.0.0", FirmwareVersion::latest());
192 }
193
194 #[rstest::rstest]
195 #[case(false, 0)]
196 #[case(true, FPGAVersion::ENABLED_EMULATOR_BIT)]
197 #[test]
198 fn is_emulator(#[case] expected: bool, #[case] function_bits: u8) {
199 assert_eq!(
200 expected,
201 FirmwareVersion {
202 idx: 0,
203 cpu: CPUVersion {
204 major: Major(0),
205 minor: Minor(0)
206 },
207 fpga: FPGAVersion {
208 major: Major(0),
209 minor: Minor(0),
210 function_bits
211 }
212 }
213 .is_emulator()
214 );
215 }
216
217 #[rstest::rstest]
218 #[test]
219 #[case(
220 "0: CPU = v0.4, FPGA = v0.5",
221 FirmwareVersion {
222 idx: 0,
223 cpu: CPUVersion {
224 major: Major(1),
225 minor: Minor(3)
226 },
227 fpga: FPGAVersion {
228 major: Major(2),
229 minor: Minor(4),
230 function_bits: 0
231 }
232 }
233 )]
234 #[case(
235 "0: CPU = v0.4, FPGA = v0.5 [Emulator]",
236 FirmwareVersion {
237 idx: 0,
238 cpu: CPUVersion {
239 major: Major(1),
240 minor: Minor(3)
241 },
242 fpga: FPGAVersion {
243 major: Major(2),
244 minor: Minor(4),
245 function_bits: FPGAVersion::ENABLED_EMULATOR_BIT
246 }
247 }
248 )]
249 fn display(#[case] expected: &str, #[case] info: FirmwareVersion) {
250 assert_eq!(expected, format!("{}", info));
251 assert_eq!(expected, format!("{:?}", info));
252 }
253}