atsamv71n21/matrix/
ccfg_sysio.rs

1#[doc = "Register `CCFG_SYSIO` reader"]
2pub struct R(crate::R<CCFG_SYSIO_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CCFG_SYSIO_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CCFG_SYSIO_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CCFG_SYSIO_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CCFG_SYSIO` writer"]
17pub struct W(crate::W<CCFG_SYSIO_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CCFG_SYSIO_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CCFG_SYSIO_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CCFG_SYSIO_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SYSIO4` reader - PB4 or TDI Assignment"]
38pub struct SYSIO4_R(crate::FieldReader<bool, bool>);
39impl SYSIO4_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        SYSIO4_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for SYSIO4_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `SYSIO4` writer - PB4 or TDI Assignment"]
53pub struct SYSIO4_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> SYSIO4_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
71        self.w
72    }
73}
74#[doc = "Field `SYSIO5` reader - PB5 or TDO/TRACESWO Assignment"]
75pub struct SYSIO5_R(crate::FieldReader<bool, bool>);
76impl SYSIO5_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        SYSIO5_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for SYSIO5_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `SYSIO5` writer - PB5 or TDO/TRACESWO Assignment"]
90pub struct SYSIO5_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> SYSIO5_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
108        self.w
109    }
110}
111#[doc = "Field `SYSIO6` reader - PB6 or TMS/SWDIO Assignment"]
112pub struct SYSIO6_R(crate::FieldReader<bool, bool>);
113impl SYSIO6_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        SYSIO6_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for SYSIO6_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `SYSIO6` writer - PB6 or TMS/SWDIO Assignment"]
127pub struct SYSIO6_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> SYSIO6_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
145        self.w
146    }
147}
148#[doc = "Field `SYSIO7` reader - PB7 or TCK/SWCLK Assignment"]
149pub struct SYSIO7_R(crate::FieldReader<bool, bool>);
150impl SYSIO7_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        SYSIO7_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for SYSIO7_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `SYSIO7` writer - PB7 or TCK/SWCLK Assignment"]
164pub struct SYSIO7_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> SYSIO7_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
182        self.w
183    }
184}
185#[doc = "Field `SYSIO12` reader - PB12 or ERASE Assignment"]
186pub struct SYSIO12_R(crate::FieldReader<bool, bool>);
187impl SYSIO12_R {
188    #[inline(always)]
189    pub(crate) fn new(bits: bool) -> Self {
190        SYSIO12_R(crate::FieldReader::new(bits))
191    }
192}
193impl core::ops::Deref for SYSIO12_R {
194    type Target = crate::FieldReader<bool, bool>;
195    #[inline(always)]
196    fn deref(&self) -> &Self::Target {
197        &self.0
198    }
199}
200#[doc = "Field `SYSIO12` writer - PB12 or ERASE Assignment"]
201pub struct SYSIO12_W<'a> {
202    w: &'a mut W,
203}
204impl<'a> SYSIO12_W<'a> {
205    #[doc = r"Sets the field bit"]
206    #[inline(always)]
207    pub fn set_bit(self) -> &'a mut W {
208        self.bit(true)
209    }
210    #[doc = r"Clears the field bit"]
211    #[inline(always)]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r"Writes raw bits to the field"]
216    #[inline(always)]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
219        self.w
220    }
221}
222#[doc = "Field `CAN1DMABA` reader - CAN1 DMA Base Address"]
223pub struct CAN1DMABA_R(crate::FieldReader<u16, u16>);
224impl CAN1DMABA_R {
225    #[inline(always)]
226    pub(crate) fn new(bits: u16) -> Self {
227        CAN1DMABA_R(crate::FieldReader::new(bits))
228    }
229}
230impl core::ops::Deref for CAN1DMABA_R {
231    type Target = crate::FieldReader<u16, u16>;
232    #[inline(always)]
233    fn deref(&self) -> &Self::Target {
234        &self.0
235    }
236}
237#[doc = "Field `CAN1DMABA` writer - CAN1 DMA Base Address"]
238pub struct CAN1DMABA_W<'a> {
239    w: &'a mut W,
240}
241impl<'a> CAN1DMABA_W<'a> {
242    #[doc = r"Writes raw bits to the field"]
243    #[inline(always)]
244    pub unsafe fn bits(self, value: u16) -> &'a mut W {
245        self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16);
246        self.w
247    }
248}
249impl R {
250    #[doc = "Bit 4 - PB4 or TDI Assignment"]
251    #[inline(always)]
252    pub fn sysio4(&self) -> SYSIO4_R {
253        SYSIO4_R::new(((self.bits >> 4) & 0x01) != 0)
254    }
255    #[doc = "Bit 5 - PB5 or TDO/TRACESWO Assignment"]
256    #[inline(always)]
257    pub fn sysio5(&self) -> SYSIO5_R {
258        SYSIO5_R::new(((self.bits >> 5) & 0x01) != 0)
259    }
260    #[doc = "Bit 6 - PB6 or TMS/SWDIO Assignment"]
261    #[inline(always)]
262    pub fn sysio6(&self) -> SYSIO6_R {
263        SYSIO6_R::new(((self.bits >> 6) & 0x01) != 0)
264    }
265    #[doc = "Bit 7 - PB7 or TCK/SWCLK Assignment"]
266    #[inline(always)]
267    pub fn sysio7(&self) -> SYSIO7_R {
268        SYSIO7_R::new(((self.bits >> 7) & 0x01) != 0)
269    }
270    #[doc = "Bit 12 - PB12 or ERASE Assignment"]
271    #[inline(always)]
272    pub fn sysio12(&self) -> SYSIO12_R {
273        SYSIO12_R::new(((self.bits >> 12) & 0x01) != 0)
274    }
275    #[doc = "Bits 16:31 - CAN1 DMA Base Address"]
276    #[inline(always)]
277    pub fn can1dmaba(&self) -> CAN1DMABA_R {
278        CAN1DMABA_R::new(((self.bits >> 16) & 0xffff) as u16)
279    }
280}
281impl W {
282    #[doc = "Bit 4 - PB4 or TDI Assignment"]
283    #[inline(always)]
284    pub fn sysio4(&mut self) -> SYSIO4_W {
285        SYSIO4_W { w: self }
286    }
287    #[doc = "Bit 5 - PB5 or TDO/TRACESWO Assignment"]
288    #[inline(always)]
289    pub fn sysio5(&mut self) -> SYSIO5_W {
290        SYSIO5_W { w: self }
291    }
292    #[doc = "Bit 6 - PB6 or TMS/SWDIO Assignment"]
293    #[inline(always)]
294    pub fn sysio6(&mut self) -> SYSIO6_W {
295        SYSIO6_W { w: self }
296    }
297    #[doc = "Bit 7 - PB7 or TCK/SWCLK Assignment"]
298    #[inline(always)]
299    pub fn sysio7(&mut self) -> SYSIO7_W {
300        SYSIO7_W { w: self }
301    }
302    #[doc = "Bit 12 - PB12 or ERASE Assignment"]
303    #[inline(always)]
304    pub fn sysio12(&mut self) -> SYSIO12_W {
305        SYSIO12_W { w: self }
306    }
307    #[doc = "Bits 16:31 - CAN1 DMA Base Address"]
308    #[inline(always)]
309    pub fn can1dmaba(&mut self) -> CAN1DMABA_W {
310        CAN1DMABA_W { w: self }
311    }
312    #[doc = "Writes raw bits to the register."]
313    #[inline(always)]
314    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
315        self.0.bits(bits);
316        self
317    }
318}
319#[doc = "System I/O and CAN1 Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccfg_sysio](index.html) module"]
320pub struct CCFG_SYSIO_SPEC;
321impl crate::RegisterSpec for CCFG_SYSIO_SPEC {
322    type Ux = u32;
323}
324#[doc = "`read()` method returns [ccfg_sysio::R](R) reader structure"]
325impl crate::Readable for CCFG_SYSIO_SPEC {
326    type Reader = R;
327}
328#[doc = "`write(|w| ..)` method takes [ccfg_sysio::W](W) writer structure"]
329impl crate::Writable for CCFG_SYSIO_SPEC {
330    type Writer = W;
331}
332#[doc = "`reset()` method sets CCFG_SYSIO to value 0"]
333impl crate::Resettable for CCFG_SYSIO_SPEC {
334    #[inline(always)]
335    fn reset_value() -> Self::Ux {
336        0
337    }
338}
atsamv71n21/matrix/ccfg_sysio.rs

atsamv71n21/matrix/
ccfg_sysio.rs
