#[doc = "Register `PWM_OSC` writer"]
pub struct W(crate::W<PWM_OSC_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<PWM_OSC_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<PWM_OSC_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<PWM_OSC_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `OSCH0` writer - Output Selection Clear for PWMH output of the channel 0"]
pub struct OSCH0_W<'a> {
w: &'a mut W,
}
impl<'a> OSCH0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "Field `OSCH1` writer - Output Selection Clear for PWMH output of the channel 1"]
pub struct OSCH1_W<'a> {
w: &'a mut W,
}
impl<'a> OSCH1_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `OSCH2` writer - Output Selection Clear for PWMH output of the channel 2"]
pub struct OSCH2_W<'a> {
w: &'a mut W,
}
impl<'a> OSCH2_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `OSCH3` writer - Output Selection Clear for PWMH output of the channel 3"]
pub struct OSCH3_W<'a> {
w: &'a mut W,
}
impl<'a> OSCH3_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `OSCL0` writer - Output Selection Clear for PWML output of the channel 0"]
pub struct OSCL0_W<'a> {
w: &'a mut W,
}
impl<'a> OSCL0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
#[doc = "Field `OSCL1` writer - Output Selection Clear for PWML output of the channel 1"]
pub struct OSCL1_W<'a> {
w: &'a mut W,
}
impl<'a> OSCL1_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
self.w
}
}
#[doc = "Field `OSCL2` writer - Output Selection Clear for PWML output of the channel 2"]
pub struct OSCL2_W<'a> {
w: &'a mut W,
}
impl<'a> OSCL2_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "Field `OSCL3` writer - Output Selection Clear for PWML output of the channel 3"]
pub struct OSCL3_W<'a> {
w: &'a mut W,
}
impl<'a> OSCL3_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
self.w
}
}
impl W {
#[doc = "Bit 0 - Output Selection Clear for PWMH output of the channel 0"]
#[inline(always)]
pub fn osch0(&mut self) -> OSCH0_W {
OSCH0_W { w: self }
}
#[doc = "Bit 1 - Output Selection Clear for PWMH output of the channel 1"]
#[inline(always)]
pub fn osch1(&mut self) -> OSCH1_W {
OSCH1_W { w: self }
}
#[doc = "Bit 2 - Output Selection Clear for PWMH output of the channel 2"]
#[inline(always)]
pub fn osch2(&mut self) -> OSCH2_W {
OSCH2_W { w: self }
}
#[doc = "Bit 3 - Output Selection Clear for PWMH output of the channel 3"]
#[inline(always)]
pub fn osch3(&mut self) -> OSCH3_W {
OSCH3_W { w: self }
}
#[doc = "Bit 16 - Output Selection Clear for PWML output of the channel 0"]
#[inline(always)]
pub fn oscl0(&mut self) -> OSCL0_W {
OSCL0_W { w: self }
}
#[doc = "Bit 17 - Output Selection Clear for PWML output of the channel 1"]
#[inline(always)]
pub fn oscl1(&mut self) -> OSCL1_W {
OSCL1_W { w: self }
}
#[doc = "Bit 18 - Output Selection Clear for PWML output of the channel 2"]
#[inline(always)]
pub fn oscl2(&mut self) -> OSCL2_W {
OSCL2_W { w: self }
}
#[doc = "Bit 19 - Output Selection Clear for PWML output of the channel 3"]
#[inline(always)]
pub fn oscl3(&mut self) -> OSCL3_W {
OSCL3_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "PWM Output Selection Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwm_osc](index.html) module"]
pub struct PWM_OSC_SPEC;
impl crate::RegisterSpec for PWM_OSC_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [pwm_osc::W](W) writer structure"]
impl crate::Writable for PWM_OSC_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets PWM_OSC to value 0"]
impl crate::Resettable for PWM_OSC_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}