atsams70n21/xdmac/
xdmac_gd.rs

1#[doc = "Register `XDMAC_GD` writer"]
2pub struct W(crate::W<XDMAC_GD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<XDMAC_GD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<XDMAC_GD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<XDMAC_GD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `DI0` writer - XDMAC Channel 0 Disable Bit"]
23pub struct DI0_W<'a> {
24    w: &'a mut W,
25}
26impl<'a> DI0_W<'a> {
27    #[doc = r"Sets the field bit"]
28    #[inline(always)]
29    pub fn set_bit(self) -> &'a mut W {
30        self.bit(true)
31    }
32    #[doc = r"Clears the field bit"]
33    #[inline(always)]
34    pub fn clear_bit(self) -> &'a mut W {
35        self.bit(false)
36    }
37    #[doc = r"Writes raw bits to the field"]
38    #[inline(always)]
39    pub fn bit(self, value: bool) -> &'a mut W {
40        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
41        self.w
42    }
43}
44#[doc = "Field `DI1` writer - XDMAC Channel 1 Disable Bit"]
45pub struct DI1_W<'a> {
46    w: &'a mut W,
47}
48impl<'a> DI1_W<'a> {
49    #[doc = r"Sets the field bit"]
50    #[inline(always)]
51    pub fn set_bit(self) -> &'a mut W {
52        self.bit(true)
53    }
54    #[doc = r"Clears the field bit"]
55    #[inline(always)]
56    pub fn clear_bit(self) -> &'a mut W {
57        self.bit(false)
58    }
59    #[doc = r"Writes raw bits to the field"]
60    #[inline(always)]
61    pub fn bit(self, value: bool) -> &'a mut W {
62        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
63        self.w
64    }
65}
66#[doc = "Field `DI2` writer - XDMAC Channel 2 Disable Bit"]
67pub struct DI2_W<'a> {
68    w: &'a mut W,
69}
70impl<'a> DI2_W<'a> {
71    #[doc = r"Sets the field bit"]
72    #[inline(always)]
73    pub fn set_bit(self) -> &'a mut W {
74        self.bit(true)
75    }
76    #[doc = r"Clears the field bit"]
77    #[inline(always)]
78    pub fn clear_bit(self) -> &'a mut W {
79        self.bit(false)
80    }
81    #[doc = r"Writes raw bits to the field"]
82    #[inline(always)]
83    pub fn bit(self, value: bool) -> &'a mut W {
84        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
85        self.w
86    }
87}
88#[doc = "Field `DI3` writer - XDMAC Channel 3 Disable Bit"]
89pub struct DI3_W<'a> {
90    w: &'a mut W,
91}
92impl<'a> DI3_W<'a> {
93    #[doc = r"Sets the field bit"]
94    #[inline(always)]
95    pub fn set_bit(self) -> &'a mut W {
96        self.bit(true)
97    }
98    #[doc = r"Clears the field bit"]
99    #[inline(always)]
100    pub fn clear_bit(self) -> &'a mut W {
101        self.bit(false)
102    }
103    #[doc = r"Writes raw bits to the field"]
104    #[inline(always)]
105    pub fn bit(self, value: bool) -> &'a mut W {
106        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
107        self.w
108    }
109}
110#[doc = "Field `DI4` writer - XDMAC Channel 4 Disable Bit"]
111pub struct DI4_W<'a> {
112    w: &'a mut W,
113}
114impl<'a> DI4_W<'a> {
115    #[doc = r"Sets the field bit"]
116    #[inline(always)]
117    pub fn set_bit(self) -> &'a mut W {
118        self.bit(true)
119    }
120    #[doc = r"Clears the field bit"]
121    #[inline(always)]
122    pub fn clear_bit(self) -> &'a mut W {
123        self.bit(false)
124    }
125    #[doc = r"Writes raw bits to the field"]
126    #[inline(always)]
127    pub fn bit(self, value: bool) -> &'a mut W {
128        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
129        self.w
130    }
131}
132#[doc = "Field `DI5` writer - XDMAC Channel 5 Disable Bit"]
133pub struct DI5_W<'a> {
134    w: &'a mut W,
135}
136impl<'a> DI5_W<'a> {
137    #[doc = r"Sets the field bit"]
138    #[inline(always)]
139    pub fn set_bit(self) -> &'a mut W {
140        self.bit(true)
141    }
142    #[doc = r"Clears the field bit"]
143    #[inline(always)]
144    pub fn clear_bit(self) -> &'a mut W {
145        self.bit(false)
146    }
147    #[doc = r"Writes raw bits to the field"]
148    #[inline(always)]
149    pub fn bit(self, value: bool) -> &'a mut W {
150        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
151        self.w
152    }
153}
154#[doc = "Field `DI6` writer - XDMAC Channel 6 Disable Bit"]
155pub struct DI6_W<'a> {
156    w: &'a mut W,
157}
158impl<'a> DI6_W<'a> {
159    #[doc = r"Sets the field bit"]
160    #[inline(always)]
161    pub fn set_bit(self) -> &'a mut W {
162        self.bit(true)
163    }
164    #[doc = r"Clears the field bit"]
165    #[inline(always)]
166    pub fn clear_bit(self) -> &'a mut W {
167        self.bit(false)
168    }
169    #[doc = r"Writes raw bits to the field"]
170    #[inline(always)]
171    pub fn bit(self, value: bool) -> &'a mut W {
172        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
173        self.w
174    }
175}
176#[doc = "Field `DI7` writer - XDMAC Channel 7 Disable Bit"]
177pub struct DI7_W<'a> {
178    w: &'a mut W,
179}
180impl<'a> DI7_W<'a> {
181    #[doc = r"Sets the field bit"]
182    #[inline(always)]
183    pub fn set_bit(self) -> &'a mut W {
184        self.bit(true)
185    }
186    #[doc = r"Clears the field bit"]
187    #[inline(always)]
188    pub fn clear_bit(self) -> &'a mut W {
189        self.bit(false)
190    }
191    #[doc = r"Writes raw bits to the field"]
192    #[inline(always)]
193    pub fn bit(self, value: bool) -> &'a mut W {
194        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
195        self.w
196    }
197}
198#[doc = "Field `DI8` writer - XDMAC Channel 8 Disable Bit"]
199pub struct DI8_W<'a> {
200    w: &'a mut W,
201}
202impl<'a> DI8_W<'a> {
203    #[doc = r"Sets the field bit"]
204    #[inline(always)]
205    pub fn set_bit(self) -> &'a mut W {
206        self.bit(true)
207    }
208    #[doc = r"Clears the field bit"]
209    #[inline(always)]
210    pub fn clear_bit(self) -> &'a mut W {
211        self.bit(false)
212    }
213    #[doc = r"Writes raw bits to the field"]
214    #[inline(always)]
215    pub fn bit(self, value: bool) -> &'a mut W {
216        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
217        self.w
218    }
219}
220#[doc = "Field `DI9` writer - XDMAC Channel 9 Disable Bit"]
221pub struct DI9_W<'a> {
222    w: &'a mut W,
223}
224impl<'a> DI9_W<'a> {
225    #[doc = r"Sets the field bit"]
226    #[inline(always)]
227    pub fn set_bit(self) -> &'a mut W {
228        self.bit(true)
229    }
230    #[doc = r"Clears the field bit"]
231    #[inline(always)]
232    pub fn clear_bit(self) -> &'a mut W {
233        self.bit(false)
234    }
235    #[doc = r"Writes raw bits to the field"]
236    #[inline(always)]
237    pub fn bit(self, value: bool) -> &'a mut W {
238        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
239        self.w
240    }
241}
242#[doc = "Field `DI10` writer - XDMAC Channel 10 Disable Bit"]
243pub struct DI10_W<'a> {
244    w: &'a mut W,
245}
246impl<'a> DI10_W<'a> {
247    #[doc = r"Sets the field bit"]
248    #[inline(always)]
249    pub fn set_bit(self) -> &'a mut W {
250        self.bit(true)
251    }
252    #[doc = r"Clears the field bit"]
253    #[inline(always)]
254    pub fn clear_bit(self) -> &'a mut W {
255        self.bit(false)
256    }
257    #[doc = r"Writes raw bits to the field"]
258    #[inline(always)]
259    pub fn bit(self, value: bool) -> &'a mut W {
260        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
261        self.w
262    }
263}
264#[doc = "Field `DI11` writer - XDMAC Channel 11 Disable Bit"]
265pub struct DI11_W<'a> {
266    w: &'a mut W,
267}
268impl<'a> DI11_W<'a> {
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
283        self.w
284    }
285}
286#[doc = "Field `DI12` writer - XDMAC Channel 12 Disable Bit"]
287pub struct DI12_W<'a> {
288    w: &'a mut W,
289}
290impl<'a> DI12_W<'a> {
291    #[doc = r"Sets the field bit"]
292    #[inline(always)]
293    pub fn set_bit(self) -> &'a mut W {
294        self.bit(true)
295    }
296    #[doc = r"Clears the field bit"]
297    #[inline(always)]
298    pub fn clear_bit(self) -> &'a mut W {
299        self.bit(false)
300    }
301    #[doc = r"Writes raw bits to the field"]
302    #[inline(always)]
303    pub fn bit(self, value: bool) -> &'a mut W {
304        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
305        self.w
306    }
307}
308#[doc = "Field `DI13` writer - XDMAC Channel 13 Disable Bit"]
309pub struct DI13_W<'a> {
310    w: &'a mut W,
311}
312impl<'a> DI13_W<'a> {
313    #[doc = r"Sets the field bit"]
314    #[inline(always)]
315    pub fn set_bit(self) -> &'a mut W {
316        self.bit(true)
317    }
318    #[doc = r"Clears the field bit"]
319    #[inline(always)]
320    pub fn clear_bit(self) -> &'a mut W {
321        self.bit(false)
322    }
323    #[doc = r"Writes raw bits to the field"]
324    #[inline(always)]
325    pub fn bit(self, value: bool) -> &'a mut W {
326        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
327        self.w
328    }
329}
330#[doc = "Field `DI14` writer - XDMAC Channel 14 Disable Bit"]
331pub struct DI14_W<'a> {
332    w: &'a mut W,
333}
334impl<'a> DI14_W<'a> {
335    #[doc = r"Sets the field bit"]
336    #[inline(always)]
337    pub fn set_bit(self) -> &'a mut W {
338        self.bit(true)
339    }
340    #[doc = r"Clears the field bit"]
341    #[inline(always)]
342    pub fn clear_bit(self) -> &'a mut W {
343        self.bit(false)
344    }
345    #[doc = r"Writes raw bits to the field"]
346    #[inline(always)]
347    pub fn bit(self, value: bool) -> &'a mut W {
348        self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
349        self.w
350    }
351}
352#[doc = "Field `DI15` writer - XDMAC Channel 15 Disable Bit"]
353pub struct DI15_W<'a> {
354    w: &'a mut W,
355}
356impl<'a> DI15_W<'a> {
357    #[doc = r"Sets the field bit"]
358    #[inline(always)]
359    pub fn set_bit(self) -> &'a mut W {
360        self.bit(true)
361    }
362    #[doc = r"Clears the field bit"]
363    #[inline(always)]
364    pub fn clear_bit(self) -> &'a mut W {
365        self.bit(false)
366    }
367    #[doc = r"Writes raw bits to the field"]
368    #[inline(always)]
369    pub fn bit(self, value: bool) -> &'a mut W {
370        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
371        self.w
372    }
373}
374#[doc = "Field `DI16` writer - XDMAC Channel 16 Disable Bit"]
375pub struct DI16_W<'a> {
376    w: &'a mut W,
377}
378impl<'a> DI16_W<'a> {
379    #[doc = r"Sets the field bit"]
380    #[inline(always)]
381    pub fn set_bit(self) -> &'a mut W {
382        self.bit(true)
383    }
384    #[doc = r"Clears the field bit"]
385    #[inline(always)]
386    pub fn clear_bit(self) -> &'a mut W {
387        self.bit(false)
388    }
389    #[doc = r"Writes raw bits to the field"]
390    #[inline(always)]
391    pub fn bit(self, value: bool) -> &'a mut W {
392        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
393        self.w
394    }
395}
396#[doc = "Field `DI17` writer - XDMAC Channel 17 Disable Bit"]
397pub struct DI17_W<'a> {
398    w: &'a mut W,
399}
400impl<'a> DI17_W<'a> {
401    #[doc = r"Sets the field bit"]
402    #[inline(always)]
403    pub fn set_bit(self) -> &'a mut W {
404        self.bit(true)
405    }
406    #[doc = r"Clears the field bit"]
407    #[inline(always)]
408    pub fn clear_bit(self) -> &'a mut W {
409        self.bit(false)
410    }
411    #[doc = r"Writes raw bits to the field"]
412    #[inline(always)]
413    pub fn bit(self, value: bool) -> &'a mut W {
414        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
415        self.w
416    }
417}
418#[doc = "Field `DI18` writer - XDMAC Channel 18 Disable Bit"]
419pub struct DI18_W<'a> {
420    w: &'a mut W,
421}
422impl<'a> DI18_W<'a> {
423    #[doc = r"Sets the field bit"]
424    #[inline(always)]
425    pub fn set_bit(self) -> &'a mut W {
426        self.bit(true)
427    }
428    #[doc = r"Clears the field bit"]
429    #[inline(always)]
430    pub fn clear_bit(self) -> &'a mut W {
431        self.bit(false)
432    }
433    #[doc = r"Writes raw bits to the field"]
434    #[inline(always)]
435    pub fn bit(self, value: bool) -> &'a mut W {
436        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
437        self.w
438    }
439}
440#[doc = "Field `DI19` writer - XDMAC Channel 19 Disable Bit"]
441pub struct DI19_W<'a> {
442    w: &'a mut W,
443}
444impl<'a> DI19_W<'a> {
445    #[doc = r"Sets the field bit"]
446    #[inline(always)]
447    pub fn set_bit(self) -> &'a mut W {
448        self.bit(true)
449    }
450    #[doc = r"Clears the field bit"]
451    #[inline(always)]
452    pub fn clear_bit(self) -> &'a mut W {
453        self.bit(false)
454    }
455    #[doc = r"Writes raw bits to the field"]
456    #[inline(always)]
457    pub fn bit(self, value: bool) -> &'a mut W {
458        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
459        self.w
460    }
461}
462#[doc = "Field `DI20` writer - XDMAC Channel 20 Disable Bit"]
463pub struct DI20_W<'a> {
464    w: &'a mut W,
465}
466impl<'a> DI20_W<'a> {
467    #[doc = r"Sets the field bit"]
468    #[inline(always)]
469    pub fn set_bit(self) -> &'a mut W {
470        self.bit(true)
471    }
472    #[doc = r"Clears the field bit"]
473    #[inline(always)]
474    pub fn clear_bit(self) -> &'a mut W {
475        self.bit(false)
476    }
477    #[doc = r"Writes raw bits to the field"]
478    #[inline(always)]
479    pub fn bit(self, value: bool) -> &'a mut W {
480        self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
481        self.w
482    }
483}
484#[doc = "Field `DI21` writer - XDMAC Channel 21 Disable Bit"]
485pub struct DI21_W<'a> {
486    w: &'a mut W,
487}
488impl<'a> DI21_W<'a> {
489    #[doc = r"Sets the field bit"]
490    #[inline(always)]
491    pub fn set_bit(self) -> &'a mut W {
492        self.bit(true)
493    }
494    #[doc = r"Clears the field bit"]
495    #[inline(always)]
496    pub fn clear_bit(self) -> &'a mut W {
497        self.bit(false)
498    }
499    #[doc = r"Writes raw bits to the field"]
500    #[inline(always)]
501    pub fn bit(self, value: bool) -> &'a mut W {
502        self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
503        self.w
504    }
505}
506#[doc = "Field `DI22` writer - XDMAC Channel 22 Disable Bit"]
507pub struct DI22_W<'a> {
508    w: &'a mut W,
509}
510impl<'a> DI22_W<'a> {
511    #[doc = r"Sets the field bit"]
512    #[inline(always)]
513    pub fn set_bit(self) -> &'a mut W {
514        self.bit(true)
515    }
516    #[doc = r"Clears the field bit"]
517    #[inline(always)]
518    pub fn clear_bit(self) -> &'a mut W {
519        self.bit(false)
520    }
521    #[doc = r"Writes raw bits to the field"]
522    #[inline(always)]
523    pub fn bit(self, value: bool) -> &'a mut W {
524        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
525        self.w
526    }
527}
528#[doc = "Field `DI23` writer - XDMAC Channel 23 Disable Bit"]
529pub struct DI23_W<'a> {
530    w: &'a mut W,
531}
532impl<'a> DI23_W<'a> {
533    #[doc = r"Sets the field bit"]
534    #[inline(always)]
535    pub fn set_bit(self) -> &'a mut W {
536        self.bit(true)
537    }
538    #[doc = r"Clears the field bit"]
539    #[inline(always)]
540    pub fn clear_bit(self) -> &'a mut W {
541        self.bit(false)
542    }
543    #[doc = r"Writes raw bits to the field"]
544    #[inline(always)]
545    pub fn bit(self, value: bool) -> &'a mut W {
546        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
547        self.w
548    }
549}
550impl W {
551    #[doc = "Bit 0 - XDMAC Channel 0 Disable Bit"]
552    #[inline(always)]
553    pub fn di0(&mut self) -> DI0_W {
554        DI0_W { w: self }
555    }
556    #[doc = "Bit 1 - XDMAC Channel 1 Disable Bit"]
557    #[inline(always)]
558    pub fn di1(&mut self) -> DI1_W {
559        DI1_W { w: self }
560    }
561    #[doc = "Bit 2 - XDMAC Channel 2 Disable Bit"]
562    #[inline(always)]
563    pub fn di2(&mut self) -> DI2_W {
564        DI2_W { w: self }
565    }
566    #[doc = "Bit 3 - XDMAC Channel 3 Disable Bit"]
567    #[inline(always)]
568    pub fn di3(&mut self) -> DI3_W {
569        DI3_W { w: self }
570    }
571    #[doc = "Bit 4 - XDMAC Channel 4 Disable Bit"]
572    #[inline(always)]
573    pub fn di4(&mut self) -> DI4_W {
574        DI4_W { w: self }
575    }
576    #[doc = "Bit 5 - XDMAC Channel 5 Disable Bit"]
577    #[inline(always)]
578    pub fn di5(&mut self) -> DI5_W {
579        DI5_W { w: self }
580    }
581    #[doc = "Bit 6 - XDMAC Channel 6 Disable Bit"]
582    #[inline(always)]
583    pub fn di6(&mut self) -> DI6_W {
584        DI6_W { w: self }
585    }
586    #[doc = "Bit 7 - XDMAC Channel 7 Disable Bit"]
587    #[inline(always)]
588    pub fn di7(&mut self) -> DI7_W {
589        DI7_W { w: self }
590    }
591    #[doc = "Bit 8 - XDMAC Channel 8 Disable Bit"]
592    #[inline(always)]
593    pub fn di8(&mut self) -> DI8_W {
594        DI8_W { w: self }
595    }
596    #[doc = "Bit 9 - XDMAC Channel 9 Disable Bit"]
597    #[inline(always)]
598    pub fn di9(&mut self) -> DI9_W {
599        DI9_W { w: self }
600    }
601    #[doc = "Bit 10 - XDMAC Channel 10 Disable Bit"]
602    #[inline(always)]
603    pub fn di10(&mut self) -> DI10_W {
604        DI10_W { w: self }
605    }
606    #[doc = "Bit 11 - XDMAC Channel 11 Disable Bit"]
607    #[inline(always)]
608    pub fn di11(&mut self) -> DI11_W {
609        DI11_W { w: self }
610    }
611    #[doc = "Bit 12 - XDMAC Channel 12 Disable Bit"]
612    #[inline(always)]
613    pub fn di12(&mut self) -> DI12_W {
614        DI12_W { w: self }
615    }
616    #[doc = "Bit 13 - XDMAC Channel 13 Disable Bit"]
617    #[inline(always)]
618    pub fn di13(&mut self) -> DI13_W {
619        DI13_W { w: self }
620    }
621    #[doc = "Bit 14 - XDMAC Channel 14 Disable Bit"]
622    #[inline(always)]
623    pub fn di14(&mut self) -> DI14_W {
624        DI14_W { w: self }
625    }
626    #[doc = "Bit 15 - XDMAC Channel 15 Disable Bit"]
627    #[inline(always)]
628    pub fn di15(&mut self) -> DI15_W {
629        DI15_W { w: self }
630    }
631    #[doc = "Bit 16 - XDMAC Channel 16 Disable Bit"]
632    #[inline(always)]
633    pub fn di16(&mut self) -> DI16_W {
634        DI16_W { w: self }
635    }
636    #[doc = "Bit 17 - XDMAC Channel 17 Disable Bit"]
637    #[inline(always)]
638    pub fn di17(&mut self) -> DI17_W {
639        DI17_W { w: self }
640    }
641    #[doc = "Bit 18 - XDMAC Channel 18 Disable Bit"]
642    #[inline(always)]
643    pub fn di18(&mut self) -> DI18_W {
644        DI18_W { w: self }
645    }
646    #[doc = "Bit 19 - XDMAC Channel 19 Disable Bit"]
647    #[inline(always)]
648    pub fn di19(&mut self) -> DI19_W {
649        DI19_W { w: self }
650    }
651    #[doc = "Bit 20 - XDMAC Channel 20 Disable Bit"]
652    #[inline(always)]
653    pub fn di20(&mut self) -> DI20_W {
654        DI20_W { w: self }
655    }
656    #[doc = "Bit 21 - XDMAC Channel 21 Disable Bit"]
657    #[inline(always)]
658    pub fn di21(&mut self) -> DI21_W {
659        DI21_W { w: self }
660    }
661    #[doc = "Bit 22 - XDMAC Channel 22 Disable Bit"]
662    #[inline(always)]
663    pub fn di22(&mut self) -> DI22_W {
664        DI22_W { w: self }
665    }
666    #[doc = "Bit 23 - XDMAC Channel 23 Disable Bit"]
667    #[inline(always)]
668    pub fn di23(&mut self) -> DI23_W {
669        DI23_W { w: self }
670    }
671    #[doc = "Writes raw bits to the register."]
672    #[inline(always)]
673    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
674        self.0.bits(bits);
675        self
676    }
677}
678#[doc = "Global Channel Disable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xdmac_gd](index.html) module"]
679pub struct XDMAC_GD_SPEC;
680impl crate::RegisterSpec for XDMAC_GD_SPEC {
681    type Ux = u32;
682}
683#[doc = "`write(|w| ..)` method takes [xdmac_gd::W](W) writer structure"]
684impl crate::Writable for XDMAC_GD_SPEC {
685    type Writer = W;
686}
687#[doc = "`reset()` method sets XDMAC_GD to value 0"]
688impl crate::Resettable for XDMAC_GD_SPEC {
689    #[inline(always)]
690    fn reset_value() -> Self::Ux {
691        0
692    }
693}
atsams70n21/xdmac/xdmac_gd.rs

atsams70n21/xdmac/
xdmac_gd.rs
