atsams70n21/
tc0.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00..0x34 - Channel Control Register (channel = 0)"]
5    pub tc_channel0: TC_CHANNEL,
6    _reserved1: [u8; 0x0c],
7    #[doc = "0x40..0x74 - Channel Control Register (channel = 0)"]
8    pub tc_channel1: TC_CHANNEL,
9    _reserved2: [u8; 0x0c],
10    #[doc = "0x80..0xb4 - Channel Control Register (channel = 0)"]
11    pub tc_channel2: TC_CHANNEL,
12    _reserved3: [u8; 0x0c],
13    #[doc = "0xc0 - Block Control Register"]
14    pub tc_bcr: crate::Reg<tc_bcr::TC_BCR_SPEC>,
15    #[doc = "0xc4 - Block Mode Register"]
16    pub tc_bmr: crate::Reg<tc_bmr::TC_BMR_SPEC>,
17    #[doc = "0xc8 - QDEC Interrupt Enable Register"]
18    pub tc_qier: crate::Reg<tc_qier::TC_QIER_SPEC>,
19    #[doc = "0xcc - QDEC Interrupt Disable Register"]
20    pub tc_qidr: crate::Reg<tc_qidr::TC_QIDR_SPEC>,
21    #[doc = "0xd0 - QDEC Interrupt Mask Register"]
22    pub tc_qimr: crate::Reg<tc_qimr::TC_QIMR_SPEC>,
23    #[doc = "0xd4 - QDEC Interrupt Status Register"]
24    pub tc_qisr: crate::Reg<tc_qisr::TC_QISR_SPEC>,
25    #[doc = "0xd8 - Fault Mode Register"]
26    pub tc_fmr: crate::Reg<tc_fmr::TC_FMR_SPEC>,
27    _reserved10: [u8; 0x08],
28    #[doc = "0xe4 - Write Protection Mode Register"]
29    pub tc_wpmr: crate::Reg<tc_wpmr::TC_WPMR_SPEC>,
30}
31#[doc = r"Register block"]
32#[repr(C)]
33pub struct TC_CHANNEL {
34    #[doc = "0x00 - Channel Control Register (channel = 0)"]
35    pub tc_ccr: crate::Reg<self::tc_channel::tc_ccr::TC_CCR_SPEC>,
36    #[doc = "0x04 - Channel Mode Register (channel = 0)"]
37    pub tc_cmr: crate::Reg<self::tc_channel::tc_cmr::TC_CMR_SPEC>,
38    #[doc = "0x08 - Stepper Motor Mode Register (channel = 0)"]
39    pub tc_smmr: crate::Reg<self::tc_channel::tc_smmr::TC_SMMR_SPEC>,
40    #[doc = "0x0c - Register AB (channel = 0)"]
41    pub tc_rab: crate::Reg<self::tc_channel::tc_rab::TC_RAB_SPEC>,
42    #[doc = "0x10 - Counter Value (channel = 0)"]
43    pub tc_cv: crate::Reg<self::tc_channel::tc_cv::TC_CV_SPEC>,
44    #[doc = "0x14 - Register A (channel = 0)"]
45    pub tc_ra: crate::Reg<self::tc_channel::tc_ra::TC_RA_SPEC>,
46    #[doc = "0x18 - Register B (channel = 0)"]
47    pub tc_rb: crate::Reg<self::tc_channel::tc_rb::TC_RB_SPEC>,
48    #[doc = "0x1c - Register C (channel = 0)"]
49    pub tc_rc: crate::Reg<self::tc_channel::tc_rc::TC_RC_SPEC>,
50    #[doc = "0x20 - Status Register (channel = 0)"]
51    pub tc_sr: crate::Reg<self::tc_channel::tc_sr::TC_SR_SPEC>,
52    #[doc = "0x24 - Interrupt Enable Register (channel = 0)"]
53    pub tc_ier: crate::Reg<self::tc_channel::tc_ier::TC_IER_SPEC>,
54    #[doc = "0x28 - Interrupt Disable Register (channel = 0)"]
55    pub tc_idr: crate::Reg<self::tc_channel::tc_idr::TC_IDR_SPEC>,
56    #[doc = "0x2c - Interrupt Mask Register (channel = 0)"]
57    pub tc_imr: crate::Reg<self::tc_channel::tc_imr::TC_IMR_SPEC>,
58    #[doc = "0x30 - Extended Mode Register (channel = 0)"]
59    pub tc_emr: crate::Reg<self::tc_channel::tc_emr::TC_EMR_SPEC>,
60}
61#[doc = r"Register block"]
62#[doc = "Channel Control Register (channel = 0)"]
63pub mod tc_channel;
64#[doc = "TC_BCR register accessor: an alias for `Reg<TC_BCR_SPEC>`"]
65pub type TC_BCR = crate::Reg<tc_bcr::TC_BCR_SPEC>;
66#[doc = "Block Control Register"]
67pub mod tc_bcr;
68#[doc = "TC_BMR register accessor: an alias for `Reg<TC_BMR_SPEC>`"]
69pub type TC_BMR = crate::Reg<tc_bmr::TC_BMR_SPEC>;
70#[doc = "Block Mode Register"]
71pub mod tc_bmr;
72#[doc = "TC_QIER register accessor: an alias for `Reg<TC_QIER_SPEC>`"]
73pub type TC_QIER = crate::Reg<tc_qier::TC_QIER_SPEC>;
74#[doc = "QDEC Interrupt Enable Register"]
75pub mod tc_qier;
76#[doc = "TC_QIDR register accessor: an alias for `Reg<TC_QIDR_SPEC>`"]
77pub type TC_QIDR = crate::Reg<tc_qidr::TC_QIDR_SPEC>;
78#[doc = "QDEC Interrupt Disable Register"]
79pub mod tc_qidr;
80#[doc = "TC_QIMR register accessor: an alias for `Reg<TC_QIMR_SPEC>`"]
81pub type TC_QIMR = crate::Reg<tc_qimr::TC_QIMR_SPEC>;
82#[doc = "QDEC Interrupt Mask Register"]
83pub mod tc_qimr;
84#[doc = "TC_QISR register accessor: an alias for `Reg<TC_QISR_SPEC>`"]
85pub type TC_QISR = crate::Reg<tc_qisr::TC_QISR_SPEC>;
86#[doc = "QDEC Interrupt Status Register"]
87pub mod tc_qisr;
88#[doc = "TC_FMR register accessor: an alias for `Reg<TC_FMR_SPEC>`"]
89pub type TC_FMR = crate::Reg<tc_fmr::TC_FMR_SPEC>;
90#[doc = "Fault Mode Register"]
91pub mod tc_fmr;
92#[doc = "TC_WPMR register accessor: an alias for `Reg<TC_WPMR_SPEC>`"]
93pub type TC_WPMR = crate::Reg<tc_wpmr::TC_WPMR_SPEC>;
94#[doc = "Write Protection Mode Register"]
95pub mod tc_wpmr;
atsams70n21/tc0.rs

atsams70n21/
tc0.rs
