atsams70j20/pmc/
pmc_pcr.rs

1#[doc = "Register `PMC_PCR` reader"]
2pub struct R(crate::R<PMC_PCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PMC_PCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PMC_PCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PMC_PCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PMC_PCR` writer"]
17pub struct W(crate::W<PMC_PCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PMC_PCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PMC_PCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PMC_PCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PID` reader - Peripheral ID"]
38pub struct PID_R(crate::FieldReader<u8, u8>);
39impl PID_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        PID_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for PID_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `PID` writer - Peripheral ID"]
53pub struct PID_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> PID_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f);
61        self.w
62    }
63}
64#[doc = "Generic Clock Source Selection\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq)]
66#[repr(u8)]
67pub enum GCLKCSS_A {
68    #[doc = "0: Slow clock is selected"]
69    SLOW_CLK = 0,
70    #[doc = "1: Main clock is selected"]
71    MAIN_CLK = 1,
72    #[doc = "2: PLLACK is selected"]
73    PLLA_CLK = 2,
74    #[doc = "3: UPLL Clock is selected"]
75    UPLL_CLK = 3,
76    #[doc = "4: Master Clock is selected"]
77    MCK_CLK = 4,
78}
79impl From<GCLKCSS_A> for u8 {
80    #[inline(always)]
81    fn from(variant: GCLKCSS_A) -> Self {
82        variant as _
83    }
84}
85#[doc = "Field `GCLKCSS` reader - Generic Clock Source Selection"]
86pub struct GCLKCSS_R(crate::FieldReader<u8, GCLKCSS_A>);
87impl GCLKCSS_R {
88    #[inline(always)]
89    pub(crate) fn new(bits: u8) -> Self {
90        GCLKCSS_R(crate::FieldReader::new(bits))
91    }
92    #[doc = r"Get enumerated values variant"]
93    #[inline(always)]
94    pub fn variant(&self) -> Option<GCLKCSS_A> {
95        match self.bits {
96            0 => Some(GCLKCSS_A::SLOW_CLK),
97            1 => Some(GCLKCSS_A::MAIN_CLK),
98            2 => Some(GCLKCSS_A::PLLA_CLK),
99            3 => Some(GCLKCSS_A::UPLL_CLK),
100            4 => Some(GCLKCSS_A::MCK_CLK),
101            _ => None,
102        }
103    }
104    #[doc = "Checks if the value of the field is `SLOW_CLK`"]
105    #[inline(always)]
106    pub fn is_slow_clk(&self) -> bool {
107        **self == GCLKCSS_A::SLOW_CLK
108    }
109    #[doc = "Checks if the value of the field is `MAIN_CLK`"]
110    #[inline(always)]
111    pub fn is_main_clk(&self) -> bool {
112        **self == GCLKCSS_A::MAIN_CLK
113    }
114    #[doc = "Checks if the value of the field is `PLLA_CLK`"]
115    #[inline(always)]
116    pub fn is_plla_clk(&self) -> bool {
117        **self == GCLKCSS_A::PLLA_CLK
118    }
119    #[doc = "Checks if the value of the field is `UPLL_CLK`"]
120    #[inline(always)]
121    pub fn is_upll_clk(&self) -> bool {
122        **self == GCLKCSS_A::UPLL_CLK
123    }
124    #[doc = "Checks if the value of the field is `MCK_CLK`"]
125    #[inline(always)]
126    pub fn is_mck_clk(&self) -> bool {
127        **self == GCLKCSS_A::MCK_CLK
128    }
129}
130impl core::ops::Deref for GCLKCSS_R {
131    type Target = crate::FieldReader<u8, GCLKCSS_A>;
132    #[inline(always)]
133    fn deref(&self) -> &Self::Target {
134        &self.0
135    }
136}
137#[doc = "Field `GCLKCSS` writer - Generic Clock Source Selection"]
138pub struct GCLKCSS_W<'a> {
139    w: &'a mut W,
140}
141impl<'a> GCLKCSS_W<'a> {
142    #[doc = r"Writes `variant` to the field"]
143    #[inline(always)]
144    pub fn variant(self, variant: GCLKCSS_A) -> &'a mut W {
145        unsafe { self.bits(variant.into()) }
146    }
147    #[doc = "Slow clock is selected"]
148    #[inline(always)]
149    pub fn slow_clk(self) -> &'a mut W {
150        self.variant(GCLKCSS_A::SLOW_CLK)
151    }
152    #[doc = "Main clock is selected"]
153    #[inline(always)]
154    pub fn main_clk(self) -> &'a mut W {
155        self.variant(GCLKCSS_A::MAIN_CLK)
156    }
157    #[doc = "PLLACK is selected"]
158    #[inline(always)]
159    pub fn plla_clk(self) -> &'a mut W {
160        self.variant(GCLKCSS_A::PLLA_CLK)
161    }
162    #[doc = "UPLL Clock is selected"]
163    #[inline(always)]
164    pub fn upll_clk(self) -> &'a mut W {
165        self.variant(GCLKCSS_A::UPLL_CLK)
166    }
167    #[doc = "Master Clock is selected"]
168    #[inline(always)]
169    pub fn mck_clk(self) -> &'a mut W {
170        self.variant(GCLKCSS_A::MCK_CLK)
171    }
172    #[doc = r"Writes raw bits to the field"]
173    #[inline(always)]
174    pub unsafe fn bits(self, value: u8) -> &'a mut W {
175        self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8);
176        self.w
177    }
178}
179#[doc = "Field `CMD` reader - Command"]
180pub struct CMD_R(crate::FieldReader<bool, bool>);
181impl CMD_R {
182    #[inline(always)]
183    pub(crate) fn new(bits: bool) -> Self {
184        CMD_R(crate::FieldReader::new(bits))
185    }
186}
187impl core::ops::Deref for CMD_R {
188    type Target = crate::FieldReader<bool, bool>;
189    #[inline(always)]
190    fn deref(&self) -> &Self::Target {
191        &self.0
192    }
193}
194#[doc = "Field `CMD` writer - Command"]
195pub struct CMD_W<'a> {
196    w: &'a mut W,
197}
198impl<'a> CMD_W<'a> {
199    #[doc = r"Sets the field bit"]
200    #[inline(always)]
201    pub fn set_bit(self) -> &'a mut W {
202        self.bit(true)
203    }
204    #[doc = r"Clears the field bit"]
205    #[inline(always)]
206    pub fn clear_bit(self) -> &'a mut W {
207        self.bit(false)
208    }
209    #[doc = r"Writes raw bits to the field"]
210    #[inline(always)]
211    pub fn bit(self, value: bool) -> &'a mut W {
212        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
213        self.w
214    }
215}
216#[doc = "Field `GCLKDIV` reader - Generic Clock Division Ratio"]
217pub struct GCLKDIV_R(crate::FieldReader<u8, u8>);
218impl GCLKDIV_R {
219    #[inline(always)]
220    pub(crate) fn new(bits: u8) -> Self {
221        GCLKDIV_R(crate::FieldReader::new(bits))
222    }
223}
224impl core::ops::Deref for GCLKDIV_R {
225    type Target = crate::FieldReader<u8, u8>;
226    #[inline(always)]
227    fn deref(&self) -> &Self::Target {
228        &self.0
229    }
230}
231#[doc = "Field `GCLKDIV` writer - Generic Clock Division Ratio"]
232pub struct GCLKDIV_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> GCLKDIV_W<'a> {
236    #[doc = r"Writes raw bits to the field"]
237    #[inline(always)]
238    pub unsafe fn bits(self, value: u8) -> &'a mut W {
239        self.w.bits = (self.w.bits & !(0xff << 20)) | ((value as u32 & 0xff) << 20);
240        self.w
241    }
242}
243#[doc = "Field `EN` reader - Enable"]
244pub struct EN_R(crate::FieldReader<bool, bool>);
245impl EN_R {
246    #[inline(always)]
247    pub(crate) fn new(bits: bool) -> Self {
248        EN_R(crate::FieldReader::new(bits))
249    }
250}
251impl core::ops::Deref for EN_R {
252    type Target = crate::FieldReader<bool, bool>;
253    #[inline(always)]
254    fn deref(&self) -> &Self::Target {
255        &self.0
256    }
257}
258#[doc = "Field `EN` writer - Enable"]
259pub struct EN_W<'a> {
260    w: &'a mut W,
261}
262impl<'a> EN_W<'a> {
263    #[doc = r"Sets the field bit"]
264    #[inline(always)]
265    pub fn set_bit(self) -> &'a mut W {
266        self.bit(true)
267    }
268    #[doc = r"Clears the field bit"]
269    #[inline(always)]
270    pub fn clear_bit(self) -> &'a mut W {
271        self.bit(false)
272    }
273    #[doc = r"Writes raw bits to the field"]
274    #[inline(always)]
275    pub fn bit(self, value: bool) -> &'a mut W {
276        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
277        self.w
278    }
279}
280#[doc = "Field `GCLKEN` reader - Generic Clock Enable"]
281pub struct GCLKEN_R(crate::FieldReader<bool, bool>);
282impl GCLKEN_R {
283    #[inline(always)]
284    pub(crate) fn new(bits: bool) -> Self {
285        GCLKEN_R(crate::FieldReader::new(bits))
286    }
287}
288impl core::ops::Deref for GCLKEN_R {
289    type Target = crate::FieldReader<bool, bool>;
290    #[inline(always)]
291    fn deref(&self) -> &Self::Target {
292        &self.0
293    }
294}
295#[doc = "Field `GCLKEN` writer - Generic Clock Enable"]
296pub struct GCLKEN_W<'a> {
297    w: &'a mut W,
298}
299impl<'a> GCLKEN_W<'a> {
300    #[doc = r"Sets the field bit"]
301    #[inline(always)]
302    pub fn set_bit(self) -> &'a mut W {
303        self.bit(true)
304    }
305    #[doc = r"Clears the field bit"]
306    #[inline(always)]
307    pub fn clear_bit(self) -> &'a mut W {
308        self.bit(false)
309    }
310    #[doc = r"Writes raw bits to the field"]
311    #[inline(always)]
312    pub fn bit(self, value: bool) -> &'a mut W {
313        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
314        self.w
315    }
316}
317impl R {
318    #[doc = "Bits 0:6 - Peripheral ID"]
319    #[inline(always)]
320    pub fn pid(&self) -> PID_R {
321        PID_R::new((self.bits & 0x7f) as u8)
322    }
323    #[doc = "Bits 8:10 - Generic Clock Source Selection"]
324    #[inline(always)]
325    pub fn gclkcss(&self) -> GCLKCSS_R {
326        GCLKCSS_R::new(((self.bits >> 8) & 0x07) as u8)
327    }
328    #[doc = "Bit 12 - Command"]
329    #[inline(always)]
330    pub fn cmd(&self) -> CMD_R {
331        CMD_R::new(((self.bits >> 12) & 0x01) != 0)
332    }
333    #[doc = "Bits 20:27 - Generic Clock Division Ratio"]
334    #[inline(always)]
335    pub fn gclkdiv(&self) -> GCLKDIV_R {
336        GCLKDIV_R::new(((self.bits >> 20) & 0xff) as u8)
337    }
338    #[doc = "Bit 28 - Enable"]
339    #[inline(always)]
340    pub fn en(&self) -> EN_R {
341        EN_R::new(((self.bits >> 28) & 0x01) != 0)
342    }
343    #[doc = "Bit 29 - Generic Clock Enable"]
344    #[inline(always)]
345    pub fn gclken(&self) -> GCLKEN_R {
346        GCLKEN_R::new(((self.bits >> 29) & 0x01) != 0)
347    }
348}
349impl W {
350    #[doc = "Bits 0:6 - Peripheral ID"]
351    #[inline(always)]
352    pub fn pid(&mut self) -> PID_W {
353        PID_W { w: self }
354    }
355    #[doc = "Bits 8:10 - Generic Clock Source Selection"]
356    #[inline(always)]
357    pub fn gclkcss(&mut self) -> GCLKCSS_W {
358        GCLKCSS_W { w: self }
359    }
360    #[doc = "Bit 12 - Command"]
361    #[inline(always)]
362    pub fn cmd(&mut self) -> CMD_W {
363        CMD_W { w: self }
364    }
365    #[doc = "Bits 20:27 - Generic Clock Division Ratio"]
366    #[inline(always)]
367    pub fn gclkdiv(&mut self) -> GCLKDIV_W {
368        GCLKDIV_W { w: self }
369    }
370    #[doc = "Bit 28 - Enable"]
371    #[inline(always)]
372    pub fn en(&mut self) -> EN_W {
373        EN_W { w: self }
374    }
375    #[doc = "Bit 29 - Generic Clock Enable"]
376    #[inline(always)]
377    pub fn gclken(&mut self) -> GCLKEN_W {
378        GCLKEN_W { w: self }
379    }
380    #[doc = "Writes raw bits to the register."]
381    #[inline(always)]
382    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
383        self.0.bits(bits);
384        self
385    }
386}
387#[doc = "Peripheral Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pmc_pcr](index.html) module"]
388pub struct PMC_PCR_SPEC;
389impl crate::RegisterSpec for PMC_PCR_SPEC {
390    type Ux = u32;
391}
392#[doc = "`read()` method returns [pmc_pcr::R](R) reader structure"]
393impl crate::Readable for PMC_PCR_SPEC {
394    type Reader = R;
395}
396#[doc = "`write(|w| ..)` method takes [pmc_pcr::W](W) writer structure"]
397impl crate::Writable for PMC_PCR_SPEC {
398    type Writer = W;
399}
400#[doc = "`reset()` method sets PMC_PCR to value 0"]
401impl crate::Resettable for PMC_PCR_SPEC {
402    #[inline(always)]
403    fn reset_value() -> Self::Ux {
404        0
405    }
406}
atsams70j20/pmc/pmc_pcr.rs

atsams70j20/pmc/
pmc_pcr.rs
