atsams70j20/usbhs/
usbhs_devifr.rs

1#[doc = "Register `USBHS_DEVIFR` writer"]
2pub struct W(crate::W<USBHS_DEVIFR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<USBHS_DEVIFR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<USBHS_DEVIFR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<USBHS_DEVIFR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `SUSPS` writer - Suspend Interrupt Set"]
23pub struct SUSPS_W<'a> {
24    w: &'a mut W,
25}
26impl<'a> SUSPS_W<'a> {
27    #[doc = r"Sets the field bit"]
28    #[inline(always)]
29    pub fn set_bit(self) -> &'a mut W {
30        self.bit(true)
31    }
32    #[doc = r"Clears the field bit"]
33    #[inline(always)]
34    pub fn clear_bit(self) -> &'a mut W {
35        self.bit(false)
36    }
37    #[doc = r"Writes raw bits to the field"]
38    #[inline(always)]
39    pub fn bit(self, value: bool) -> &'a mut W {
40        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
41        self.w
42    }
43}
44#[doc = "Field `MSOFS` writer - Micro Start of Frame Interrupt Set"]
45pub struct MSOFS_W<'a> {
46    w: &'a mut W,
47}
48impl<'a> MSOFS_W<'a> {
49    #[doc = r"Sets the field bit"]
50    #[inline(always)]
51    pub fn set_bit(self) -> &'a mut W {
52        self.bit(true)
53    }
54    #[doc = r"Clears the field bit"]
55    #[inline(always)]
56    pub fn clear_bit(self) -> &'a mut W {
57        self.bit(false)
58    }
59    #[doc = r"Writes raw bits to the field"]
60    #[inline(always)]
61    pub fn bit(self, value: bool) -> &'a mut W {
62        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
63        self.w
64    }
65}
66#[doc = "Field `SOFS` writer - Start of Frame Interrupt Set"]
67pub struct SOFS_W<'a> {
68    w: &'a mut W,
69}
70impl<'a> SOFS_W<'a> {
71    #[doc = r"Sets the field bit"]
72    #[inline(always)]
73    pub fn set_bit(self) -> &'a mut W {
74        self.bit(true)
75    }
76    #[doc = r"Clears the field bit"]
77    #[inline(always)]
78    pub fn clear_bit(self) -> &'a mut W {
79        self.bit(false)
80    }
81    #[doc = r"Writes raw bits to the field"]
82    #[inline(always)]
83    pub fn bit(self, value: bool) -> &'a mut W {
84        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
85        self.w
86    }
87}
88#[doc = "Field `EORSTS` writer - End of Reset Interrupt Set"]
89pub struct EORSTS_W<'a> {
90    w: &'a mut W,
91}
92impl<'a> EORSTS_W<'a> {
93    #[doc = r"Sets the field bit"]
94    #[inline(always)]
95    pub fn set_bit(self) -> &'a mut W {
96        self.bit(true)
97    }
98    #[doc = r"Clears the field bit"]
99    #[inline(always)]
100    pub fn clear_bit(self) -> &'a mut W {
101        self.bit(false)
102    }
103    #[doc = r"Writes raw bits to the field"]
104    #[inline(always)]
105    pub fn bit(self, value: bool) -> &'a mut W {
106        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
107        self.w
108    }
109}
110#[doc = "Field `WAKEUPS` writer - Wake-Up Interrupt Set"]
111pub struct WAKEUPS_W<'a> {
112    w: &'a mut W,
113}
114impl<'a> WAKEUPS_W<'a> {
115    #[doc = r"Sets the field bit"]
116    #[inline(always)]
117    pub fn set_bit(self) -> &'a mut W {
118        self.bit(true)
119    }
120    #[doc = r"Clears the field bit"]
121    #[inline(always)]
122    pub fn clear_bit(self) -> &'a mut W {
123        self.bit(false)
124    }
125    #[doc = r"Writes raw bits to the field"]
126    #[inline(always)]
127    pub fn bit(self, value: bool) -> &'a mut W {
128        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
129        self.w
130    }
131}
132#[doc = "Field `EORSMS` writer - End of Resume Interrupt Set"]
133pub struct EORSMS_W<'a> {
134    w: &'a mut W,
135}
136impl<'a> EORSMS_W<'a> {
137    #[doc = r"Sets the field bit"]
138    #[inline(always)]
139    pub fn set_bit(self) -> &'a mut W {
140        self.bit(true)
141    }
142    #[doc = r"Clears the field bit"]
143    #[inline(always)]
144    pub fn clear_bit(self) -> &'a mut W {
145        self.bit(false)
146    }
147    #[doc = r"Writes raw bits to the field"]
148    #[inline(always)]
149    pub fn bit(self, value: bool) -> &'a mut W {
150        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
151        self.w
152    }
153}
154#[doc = "Field `UPRSMS` writer - Upstream Resume Interrupt Set"]
155pub struct UPRSMS_W<'a> {
156    w: &'a mut W,
157}
158impl<'a> UPRSMS_W<'a> {
159    #[doc = r"Sets the field bit"]
160    #[inline(always)]
161    pub fn set_bit(self) -> &'a mut W {
162        self.bit(true)
163    }
164    #[doc = r"Clears the field bit"]
165    #[inline(always)]
166    pub fn clear_bit(self) -> &'a mut W {
167        self.bit(false)
168    }
169    #[doc = r"Writes raw bits to the field"]
170    #[inline(always)]
171    pub fn bit(self, value: bool) -> &'a mut W {
172        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
173        self.w
174    }
175}
176#[doc = "Field `DMA_1` writer - DMA Channel 1 Interrupt Set"]
177pub struct DMA_1_W<'a> {
178    w: &'a mut W,
179}
180impl<'a> DMA_1_W<'a> {
181    #[doc = r"Sets the field bit"]
182    #[inline(always)]
183    pub fn set_bit(self) -> &'a mut W {
184        self.bit(true)
185    }
186    #[doc = r"Clears the field bit"]
187    #[inline(always)]
188    pub fn clear_bit(self) -> &'a mut W {
189        self.bit(false)
190    }
191    #[doc = r"Writes raw bits to the field"]
192    #[inline(always)]
193    pub fn bit(self, value: bool) -> &'a mut W {
194        self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
195        self.w
196    }
197}
198#[doc = "Field `DMA_2` writer - DMA Channel 2 Interrupt Set"]
199pub struct DMA_2_W<'a> {
200    w: &'a mut W,
201}
202impl<'a> DMA_2_W<'a> {
203    #[doc = r"Sets the field bit"]
204    #[inline(always)]
205    pub fn set_bit(self) -> &'a mut W {
206        self.bit(true)
207    }
208    #[doc = r"Clears the field bit"]
209    #[inline(always)]
210    pub fn clear_bit(self) -> &'a mut W {
211        self.bit(false)
212    }
213    #[doc = r"Writes raw bits to the field"]
214    #[inline(always)]
215    pub fn bit(self, value: bool) -> &'a mut W {
216        self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
217        self.w
218    }
219}
220#[doc = "Field `DMA_3` writer - DMA Channel 3 Interrupt Set"]
221pub struct DMA_3_W<'a> {
222    w: &'a mut W,
223}
224impl<'a> DMA_3_W<'a> {
225    #[doc = r"Sets the field bit"]
226    #[inline(always)]
227    pub fn set_bit(self) -> &'a mut W {
228        self.bit(true)
229    }
230    #[doc = r"Clears the field bit"]
231    #[inline(always)]
232    pub fn clear_bit(self) -> &'a mut W {
233        self.bit(false)
234    }
235    #[doc = r"Writes raw bits to the field"]
236    #[inline(always)]
237    pub fn bit(self, value: bool) -> &'a mut W {
238        self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
239        self.w
240    }
241}
242#[doc = "Field `DMA_4` writer - DMA Channel 4 Interrupt Set"]
243pub struct DMA_4_W<'a> {
244    w: &'a mut W,
245}
246impl<'a> DMA_4_W<'a> {
247    #[doc = r"Sets the field bit"]
248    #[inline(always)]
249    pub fn set_bit(self) -> &'a mut W {
250        self.bit(true)
251    }
252    #[doc = r"Clears the field bit"]
253    #[inline(always)]
254    pub fn clear_bit(self) -> &'a mut W {
255        self.bit(false)
256    }
257    #[doc = r"Writes raw bits to the field"]
258    #[inline(always)]
259    pub fn bit(self, value: bool) -> &'a mut W {
260        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
261        self.w
262    }
263}
264#[doc = "Field `DMA_5` writer - DMA Channel 5 Interrupt Set"]
265pub struct DMA_5_W<'a> {
266    w: &'a mut W,
267}
268impl<'a> DMA_5_W<'a> {
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
283        self.w
284    }
285}
286#[doc = "Field `DMA_6` writer - DMA Channel 6 Interrupt Set"]
287pub struct DMA_6_W<'a> {
288    w: &'a mut W,
289}
290impl<'a> DMA_6_W<'a> {
291    #[doc = r"Sets the field bit"]
292    #[inline(always)]
293    pub fn set_bit(self) -> &'a mut W {
294        self.bit(true)
295    }
296    #[doc = r"Clears the field bit"]
297    #[inline(always)]
298    pub fn clear_bit(self) -> &'a mut W {
299        self.bit(false)
300    }
301    #[doc = r"Writes raw bits to the field"]
302    #[inline(always)]
303    pub fn bit(self, value: bool) -> &'a mut W {
304        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
305        self.w
306    }
307}
308#[doc = "Field `DMA_7` writer - DMA Channel 7 Interrupt Set"]
309pub struct DMA_7_W<'a> {
310    w: &'a mut W,
311}
312impl<'a> DMA_7_W<'a> {
313    #[doc = r"Sets the field bit"]
314    #[inline(always)]
315    pub fn set_bit(self) -> &'a mut W {
316        self.bit(true)
317    }
318    #[doc = r"Clears the field bit"]
319    #[inline(always)]
320    pub fn clear_bit(self) -> &'a mut W {
321        self.bit(false)
322    }
323    #[doc = r"Writes raw bits to the field"]
324    #[inline(always)]
325    pub fn bit(self, value: bool) -> &'a mut W {
326        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
327        self.w
328    }
329}
330impl W {
331    #[doc = "Bit 0 - Suspend Interrupt Set"]
332    #[inline(always)]
333    pub fn susps(&mut self) -> SUSPS_W {
334        SUSPS_W { w: self }
335    }
336    #[doc = "Bit 1 - Micro Start of Frame Interrupt Set"]
337    #[inline(always)]
338    pub fn msofs(&mut self) -> MSOFS_W {
339        MSOFS_W { w: self }
340    }
341    #[doc = "Bit 2 - Start of Frame Interrupt Set"]
342    #[inline(always)]
343    pub fn sofs(&mut self) -> SOFS_W {
344        SOFS_W { w: self }
345    }
346    #[doc = "Bit 3 - End of Reset Interrupt Set"]
347    #[inline(always)]
348    pub fn eorsts(&mut self) -> EORSTS_W {
349        EORSTS_W { w: self }
350    }
351    #[doc = "Bit 4 - Wake-Up Interrupt Set"]
352    #[inline(always)]
353    pub fn wakeups(&mut self) -> WAKEUPS_W {
354        WAKEUPS_W { w: self }
355    }
356    #[doc = "Bit 5 - End of Resume Interrupt Set"]
357    #[inline(always)]
358    pub fn eorsms(&mut self) -> EORSMS_W {
359        EORSMS_W { w: self }
360    }
361    #[doc = "Bit 6 - Upstream Resume Interrupt Set"]
362    #[inline(always)]
363    pub fn uprsms(&mut self) -> UPRSMS_W {
364        UPRSMS_W { w: self }
365    }
366    #[doc = "Bit 25 - DMA Channel 1 Interrupt Set"]
367    #[inline(always)]
368    pub fn dma_1(&mut self) -> DMA_1_W {
369        DMA_1_W { w: self }
370    }
371    #[doc = "Bit 26 - DMA Channel 2 Interrupt Set"]
372    #[inline(always)]
373    pub fn dma_2(&mut self) -> DMA_2_W {
374        DMA_2_W { w: self }
375    }
376    #[doc = "Bit 27 - DMA Channel 3 Interrupt Set"]
377    #[inline(always)]
378    pub fn dma_3(&mut self) -> DMA_3_W {
379        DMA_3_W { w: self }
380    }
381    #[doc = "Bit 28 - DMA Channel 4 Interrupt Set"]
382    #[inline(always)]
383    pub fn dma_4(&mut self) -> DMA_4_W {
384        DMA_4_W { w: self }
385    }
386    #[doc = "Bit 29 - DMA Channel 5 Interrupt Set"]
387    #[inline(always)]
388    pub fn dma_5(&mut self) -> DMA_5_W {
389        DMA_5_W { w: self }
390    }
391    #[doc = "Bit 30 - DMA Channel 6 Interrupt Set"]
392    #[inline(always)]
393    pub fn dma_6(&mut self) -> DMA_6_W {
394        DMA_6_W { w: self }
395    }
396    #[doc = "Bit 31 - DMA Channel 7 Interrupt Set"]
397    #[inline(always)]
398    pub fn dma_7(&mut self) -> DMA_7_W {
399        DMA_7_W { w: self }
400    }
401    #[doc = "Writes raw bits to the register."]
402    #[inline(always)]
403    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
404        self.0.bits(bits);
405        self
406    }
407}
408#[doc = "Device Global Interrupt Set Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbhs_devifr](index.html) module"]
409pub struct USBHS_DEVIFR_SPEC;
410impl crate::RegisterSpec for USBHS_DEVIFR_SPEC {
411    type Ux = u32;
412}
413#[doc = "`write(|w| ..)` method takes [usbhs_devifr::W](W) writer structure"]
414impl crate::Writable for USBHS_DEVIFR_SPEC {
415    type Writer = W;
416}
417#[doc = "`reset()` method sets USBHS_DEVIFR to value 0"]
418impl crate::Resettable for USBHS_DEVIFR_SPEC {
419    #[inline(always)]
420    fn reset_value() -> Self::Ux {
421        0
422    }
423}
atsams70j20/usbhs/usbhs_devifr.rs

atsams70j20/usbhs/
usbhs_devifr.rs
