Crate atsams70j19b
source · [−]Expand description
Peripheral access API for ATSAMS70J19B microcontrollers (generated using svd2rust v0.25.1 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports
pub use afec0 as afec1;pub use pioa as piob;pub use pioa as piod;pub use pwm0 as pwm1;pub use tc0 as tc1;pub use tc0 as tc2;pub use tc0 as tc3;pub use twihs0 as twihs1;pub use uart0 as uart1;pub use uart0 as uart2;pub use usart0 as usart1;Modules
Analog Comparator Controller
Advanced Encryption Standard
Analog Front-End Controller
Chip Identifier
Digital-to-Analog Converter Controller
Embedded Flash Controller
Common register and bit access and modify traits
General Purpose Backup Registers
Integrity Check Monitor
Image Sensor Interface
LOCKBIT
AHB Bus Matrix
Parallel Input/Output Controller
Power Management Controller
Pulse Width Modulation Controller
Quad Serial Peripheral Interface
Reset Controller
Reinforced Safety Watchdog Timer
Real-time Clock
Real-time Timer
System control not in SCB
Synchronous Serial Controller
Supply Controller
System timer
Timer Counter
True Random Number Generator
Two-wire Interface High Speed
Universal Asynchronous Receiver Transmitter
Universal Synchronous Asynchronous Receiver Transmitter
USB High-Speed Interface
USB Transmitter Interface Macrocell
Watchdog Timer
Extensible DMA Controller
Structs
Analog Comparator Controller
Advanced Encryption Standard
Analog Front-End Controller
Analog Front-End Controller
Cache and branch predictor maintenance operations
Chip Identifier
CPUID
Core peripherals
Digital-to-Analog Converter Controller
Debug Control Block
Data Watchpoint and Trace unit
Embedded Flash Controller
Flash Patch and Breakpoint unit
Floating Point Unit
General Purpose Backup Registers
Integrity Check Monitor
Image Sensor Interface
Instrumentation Trace Macrocell
LOCKBIT
AHB Bus Matrix
Memory Protection Unit
Nested Vector Interrupt Controller
Parallel Input/Output Controller
Parallel Input/Output Controller
Parallel Input/Output Controller
Power Management Controller
Pulse Width Modulation Controller
Pulse Width Modulation Controller
All the peripherals
Quad Serial Peripheral Interface
Reset Controller
Reinforced Safety Watchdog Timer
Real-time Clock
Real-time Timer
System Control Block
System control not in SCB
Synchronous Serial Controller
Supply Controller
SysTick: System Timer
System timer
Timer Counter
Timer Counter
Timer Counter
Timer Counter
Trace Port Interface Unit
True Random Number Generator
Two-wire Interface High Speed
Two-wire Interface High Speed
Universal Asynchronous Receiver Transmitter
Universal Asynchronous Receiver Transmitter
Universal Asynchronous Receiver Transmitter
Universal Synchronous Asynchronous Receiver Transmitter
Universal Synchronous Asynchronous Receiver Transmitter
USB High-Speed Interface
USB Transmitter Interface Macrocell
Watchdog Timer
Extensible DMA Controller
Enums
Enumeration of all the interrupts.
Constants
Number available in the NVIC for configuring priority