1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 intenclr: Intenclr,
5 intenset: Intenset,
6 intflag: Intflag,
7 status: Status,
8 xoscctrl: Xoscctrl,
9 cfdpresc: Cfdpresc,
10 evctrl: Evctrl,
11 osc16mctrl: Osc16mctrl,
12 _reserved8: [u8; 0x03],
13 dfllctrl: Dfllctrl,
14 _reserved9: [u8; 0x02],
15 dfllval: Dfllval,
16 dfllmul: Dfllmul,
17 dfllsync: Dfllsync,
18 _reserved12: [u8; 0x03],
19 dpllctrla: Dpllctrla,
20 _reserved13: [u8; 0x03],
21 dpllratio: Dpllratio,
22 dpllctrlb: Dpllctrlb,
23 dpllpresc: Dpllpresc,
24 _reserved16: [u8; 0x03],
25 dpllsyncbusy: Dpllsyncbusy,
26 _reserved17: [u8; 0x03],
27 dpllstatus: Dpllstatus,
28}
29impl RegisterBlock {
30 #[doc = "0x00 - Interrupt Enable Clear"]
31 #[inline(always)]
32 pub const fn intenclr(&self) -> &Intenclr {
33 &self.intenclr
34 }
35 #[doc = "0x04 - Interrupt Enable Set"]
36 #[inline(always)]
37 pub const fn intenset(&self) -> &Intenset {
38 &self.intenset
39 }
40 #[doc = "0x08 - Interrupt Flag Status and Clear"]
41 #[inline(always)]
42 pub const fn intflag(&self) -> &Intflag {
43 &self.intflag
44 }
45 #[doc = "0x0c - Power and Clocks Status"]
46 #[inline(always)]
47 pub const fn status(&self) -> &Status {
48 &self.status
49 }
50 #[doc = "0x10 - External Multipurpose Crystal Oscillator (XOSC) Control"]
51 #[inline(always)]
52 pub const fn xoscctrl(&self) -> &Xoscctrl {
53 &self.xoscctrl
54 }
55 #[doc = "0x12 - Cloc Failure Detector Prescaler"]
56 #[inline(always)]
57 pub const fn cfdpresc(&self) -> &Cfdpresc {
58 &self.cfdpresc
59 }
60 #[doc = "0x13 - Event Control"]
61 #[inline(always)]
62 pub const fn evctrl(&self) -> &Evctrl {
63 &self.evctrl
64 }
65 #[doc = "0x14 - 16MHz Internal Oscillator (OSC16M) Control"]
66 #[inline(always)]
67 pub const fn osc16mctrl(&self) -> &Osc16mctrl {
68 &self.osc16mctrl
69 }
70 #[doc = "0x18 - DFLL48M Control"]
71 #[inline(always)]
72 pub const fn dfllctrl(&self) -> &Dfllctrl {
73 &self.dfllctrl
74 }
75 #[doc = "0x1c - DFLL48M Value"]
76 #[inline(always)]
77 pub const fn dfllval(&self) -> &Dfllval {
78 &self.dfllval
79 }
80 #[doc = "0x20 - DFLL48M Multiplier"]
81 #[inline(always)]
82 pub const fn dfllmul(&self) -> &Dfllmul {
83 &self.dfllmul
84 }
85 #[doc = "0x24 - DFLL48M Synchronization"]
86 #[inline(always)]
87 pub const fn dfllsync(&self) -> &Dfllsync {
88 &self.dfllsync
89 }
90 #[doc = "0x28 - DPLL Control"]
91 #[inline(always)]
92 pub const fn dpllctrla(&self) -> &Dpllctrla {
93 &self.dpllctrla
94 }
95 #[doc = "0x2c - DPLL Ratio Control"]
96 #[inline(always)]
97 pub const fn dpllratio(&self) -> &Dpllratio {
98 &self.dpllratio
99 }
100 #[doc = "0x30 - Digital Core Configuration"]
101 #[inline(always)]
102 pub const fn dpllctrlb(&self) -> &Dpllctrlb {
103 &self.dpllctrlb
104 }
105 #[doc = "0x34 - DPLL Prescaler"]
106 #[inline(always)]
107 pub const fn dpllpresc(&self) -> &Dpllpresc {
108 &self.dpllpresc
109 }
110 #[doc = "0x38 - DPLL Synchronization Busy"]
111 #[inline(always)]
112 pub const fn dpllsyncbusy(&self) -> &Dpllsyncbusy {
113 &self.dpllsyncbusy
114 }
115 #[doc = "0x3c - DPLL Status"]
116 #[inline(always)]
117 pub const fn dpllstatus(&self) -> &Dpllstatus {
118 &self.dpllstatus
119 }
120}
121#[doc = "INTENCLR (rw) register accessor: Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenclr`]
122module"]
123#[doc(alias = "INTENCLR")]
124pub type Intenclr = crate::Reg<intenclr::IntenclrSpec>;
125#[doc = "Interrupt Enable Clear"]
126pub mod intenclr;
127#[doc = "INTENSET (rw) register accessor: Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenset`]
128module"]
129#[doc(alias = "INTENSET")]
130pub type Intenset = crate::Reg<intenset::IntensetSpec>;
131#[doc = "Interrupt Enable Set"]
132pub mod intenset;
133#[doc = "INTFLAG (rw) register accessor: Interrupt Flag Status and Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intflag`]
134module"]
135#[doc(alias = "INTFLAG")]
136pub type Intflag = crate::Reg<intflag::IntflagSpec>;
137#[doc = "Interrupt Flag Status and Clear"]
138pub mod intflag;
139#[doc = "STATUS (r) register accessor: Power and Clocks Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
140module"]
141#[doc(alias = "STATUS")]
142pub type Status = crate::Reg<status::StatusSpec>;
143#[doc = "Power and Clocks Status"]
144pub mod status;
145#[doc = "XOSCCTRL (rw) register accessor: External Multipurpose Crystal Oscillator (XOSC) Control\n\nYou can [`read`](crate::Reg::read) this register and get [`xoscctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xoscctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xoscctrl`]
146module"]
147#[doc(alias = "XOSCCTRL")]
148pub type Xoscctrl = crate::Reg<xoscctrl::XoscctrlSpec>;
149#[doc = "External Multipurpose Crystal Oscillator (XOSC) Control"]
150pub mod xoscctrl;
151#[doc = "CFDPRESC (rw) register accessor: Cloc Failure Detector Prescaler\n\nYou can [`read`](crate::Reg::read) this register and get [`cfdpresc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfdpresc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfdpresc`]
152module"]
153#[doc(alias = "CFDPRESC")]
154pub type Cfdpresc = crate::Reg<cfdpresc::CfdprescSpec>;
155#[doc = "Cloc Failure Detector Prescaler"]
156pub mod cfdpresc;
157#[doc = "EVCTRL (rw) register accessor: Event Control\n\nYou can [`read`](crate::Reg::read) this register and get [`evctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evctrl`]
158module"]
159#[doc(alias = "EVCTRL")]
160pub type Evctrl = crate::Reg<evctrl::EvctrlSpec>;
161#[doc = "Event Control"]
162pub mod evctrl;
163#[doc = "OSC16MCTRL (rw) register accessor: 16MHz Internal Oscillator (OSC16M) Control\n\nYou can [`read`](crate::Reg::read) this register and get [`osc16mctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`osc16mctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osc16mctrl`]
164module"]
165#[doc(alias = "OSC16MCTRL")]
166pub type Osc16mctrl = crate::Reg<osc16mctrl::Osc16mctrlSpec>;
167#[doc = "16MHz Internal Oscillator (OSC16M) Control"]
168pub mod osc16mctrl;
169#[doc = "DFLLCTRL (rw) register accessor: DFLL48M Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dfllctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dfllctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dfllctrl`]
170module"]
171#[doc(alias = "DFLLCTRL")]
172pub type Dfllctrl = crate::Reg<dfllctrl::DfllctrlSpec>;
173#[doc = "DFLL48M Control"]
174pub mod dfllctrl;
175#[doc = "DFLLVAL (rw) register accessor: DFLL48M Value\n\nYou can [`read`](crate::Reg::read) this register and get [`dfllval::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dfllval::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dfllval`]
176module"]
177#[doc(alias = "DFLLVAL")]
178pub type Dfllval = crate::Reg<dfllval::DfllvalSpec>;
179#[doc = "DFLL48M Value"]
180pub mod dfllval;
181#[doc = "DFLLMUL (rw) register accessor: DFLL48M Multiplier\n\nYou can [`read`](crate::Reg::read) this register and get [`dfllmul::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dfllmul::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dfllmul`]
182module"]
183#[doc(alias = "DFLLMUL")]
184pub type Dfllmul = crate::Reg<dfllmul::DfllmulSpec>;
185#[doc = "DFLL48M Multiplier"]
186pub mod dfllmul;
187#[doc = "DFLLSYNC (rw) register accessor: DFLL48M Synchronization\n\nYou can [`read`](crate::Reg::read) this register and get [`dfllsync::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dfllsync::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dfllsync`]
188module"]
189#[doc(alias = "DFLLSYNC")]
190pub type Dfllsync = crate::Reg<dfllsync::DfllsyncSpec>;
191#[doc = "DFLL48M Synchronization"]
192pub mod dfllsync;
193#[doc = "DPLLCTRLA (rw) register accessor: DPLL Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllctrla::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllctrla::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllctrla`]
194module"]
195#[doc(alias = "DPLLCTRLA")]
196pub type Dpllctrla = crate::Reg<dpllctrla::DpllctrlaSpec>;
197#[doc = "DPLL Control"]
198pub mod dpllctrla;
199#[doc = "DPLLRATIO (rw) register accessor: DPLL Ratio Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllratio::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllratio::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllratio`]
200module"]
201#[doc(alias = "DPLLRATIO")]
202pub type Dpllratio = crate::Reg<dpllratio::DpllratioSpec>;
203#[doc = "DPLL Ratio Control"]
204pub mod dpllratio;
205#[doc = "DPLLCTRLB (rw) register accessor: Digital Core Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllctrlb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllctrlb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllctrlb`]
206module"]
207#[doc(alias = "DPLLCTRLB")]
208pub type Dpllctrlb = crate::Reg<dpllctrlb::DpllctrlbSpec>;
209#[doc = "Digital Core Configuration"]
210pub mod dpllctrlb;
211#[doc = "DPLLPRESC (rw) register accessor: DPLL Prescaler\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllpresc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllpresc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllpresc`]
212module"]
213#[doc(alias = "DPLLPRESC")]
214pub type Dpllpresc = crate::Reg<dpllpresc::DpllprescSpec>;
215#[doc = "DPLL Prescaler"]
216pub mod dpllpresc;
217#[doc = "DPLLSYNCBUSY (r) register accessor: DPLL Synchronization Busy\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllsyncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllsyncbusy`]
218module"]
219#[doc(alias = "DPLLSYNCBUSY")]
220pub type Dpllsyncbusy = crate::Reg<dpllsyncbusy::DpllsyncbusySpec>;
221#[doc = "DPLL Synchronization Busy"]
222pub mod dpllsyncbusy;
223#[doc = "DPLLSTATUS (r) register accessor: DPLL Status\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllstatus`]
224module"]
225#[doc(alias = "DPLLSTATUS")]
226pub type Dpllstatus = crate::Reg<dpllstatus::DpllstatusSpec>;
227#[doc = "DPLL Status"]
228pub mod dpllstatus;