atsaml21j18bu/dac/
ctrlb.rs

1#[doc = "Register `CTRLB` reader"]
2pub struct R(crate::R<CTRLB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLB` writer"]
17pub struct W(crate::W<CTRLB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DIFF` reader - Differential mode enable"]
38pub type DIFF_R = crate::BitReader<bool>;
39#[doc = "Field `DIFF` writer - Differential mode enable"]
40pub type DIFF_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
41#[doc = "Field `REFSEL` reader - Reference Selection for DAC0/1"]
42pub type REFSEL_R = crate::FieldReader<u8, REFSELSELECT_A>;
43#[doc = "Reference Selection for DAC0/1\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum REFSELSELECT_A {
47    #[doc = "0: External reference unbuffered"]
48    VREFPU = 0,
49    #[doc = "1: Analog supply"]
50    VDDANA = 1,
51    #[doc = "2: External reference buffered"]
52    VREFPB = 2,
53    #[doc = "3: Internal bandgap reference"]
54    INTREF = 3,
55}
56impl From<REFSELSELECT_A> for u8 {
57    #[inline(always)]
58    fn from(variant: REFSELSELECT_A) -> Self {
59        variant as _
60    }
61}
62impl REFSEL_R {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> REFSELSELECT_A {
66        match self.bits {
67            0 => REFSELSELECT_A::VREFPU,
68            1 => REFSELSELECT_A::VDDANA,
69            2 => REFSELSELECT_A::VREFPB,
70            3 => REFSELSELECT_A::INTREF,
71            _ => unreachable!(),
72        }
73    }
74    #[doc = "Checks if the value of the field is `VREFPU`"]
75    #[inline(always)]
76    pub fn is_vrefpu(&self) -> bool {
77        *self == REFSELSELECT_A::VREFPU
78    }
79    #[doc = "Checks if the value of the field is `VDDANA`"]
80    #[inline(always)]
81    pub fn is_vddana(&self) -> bool {
82        *self == REFSELSELECT_A::VDDANA
83    }
84    #[doc = "Checks if the value of the field is `VREFPB`"]
85    #[inline(always)]
86    pub fn is_vrefpb(&self) -> bool {
87        *self == REFSELSELECT_A::VREFPB
88    }
89    #[doc = "Checks if the value of the field is `INTREF`"]
90    #[inline(always)]
91    pub fn is_intref(&self) -> bool {
92        *self == REFSELSELECT_A::INTREF
93    }
94}
95#[doc = "Field `REFSEL` writer - Reference Selection for DAC0/1"]
96pub type REFSEL_W<'a, const O: u8> =
97    crate::FieldWriterSafe<'a, u8, CTRLB_SPEC, u8, REFSELSELECT_A, 2, O>;
98impl<'a, const O: u8> REFSEL_W<'a, O> {
99    #[doc = "External reference unbuffered"]
100    #[inline(always)]
101    pub fn vrefpu(self) -> &'a mut W {
102        self.variant(REFSELSELECT_A::VREFPU)
103    }
104    #[doc = "Analog supply"]
105    #[inline(always)]
106    pub fn vddana(self) -> &'a mut W {
107        self.variant(REFSELSELECT_A::VDDANA)
108    }
109    #[doc = "External reference buffered"]
110    #[inline(always)]
111    pub fn vrefpb(self) -> &'a mut W {
112        self.variant(REFSELSELECT_A::VREFPB)
113    }
114    #[doc = "Internal bandgap reference"]
115    #[inline(always)]
116    pub fn intref(self) -> &'a mut W {
117        self.variant(REFSELSELECT_A::INTREF)
118    }
119}
120impl R {
121    #[doc = "Bit 0 - Differential mode enable"]
122    #[inline(always)]
123    pub fn diff(&self) -> DIFF_R {
124        DIFF_R::new((self.bits & 1) != 0)
125    }
126    #[doc = "Bits 1:2 - Reference Selection for DAC0/1"]
127    #[inline(always)]
128    pub fn refsel(&self) -> REFSEL_R {
129        REFSEL_R::new((self.bits >> 1) & 3)
130    }
131}
132impl W {
133    #[doc = "Bit 0 - Differential mode enable"]
134    #[inline(always)]
135    #[must_use]
136    pub fn diff(&mut self) -> DIFF_W<0> {
137        DIFF_W::new(self)
138    }
139    #[doc = "Bits 1:2 - Reference Selection for DAC0/1"]
140    #[inline(always)]
141    #[must_use]
142    pub fn refsel(&mut self) -> REFSEL_W<1> {
143        REFSEL_W::new(self)
144    }
145    #[doc = "Writes raw bits to the register."]
146    #[inline(always)]
147    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
148        self.0.bits(bits);
149        self
150    }
151}
152#[doc = "Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
153pub struct CTRLB_SPEC;
154impl crate::RegisterSpec for CTRLB_SPEC {
155    type Ux = u8;
156}
157#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
158impl crate::Readable for CTRLB_SPEC {
159    type Reader = R;
160}
161#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
162impl crate::Writable for CTRLB_SPEC {
163    type Writer = W;
164    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
166}
167#[doc = "`reset()` method sets CTRLB to value 0"]
168impl crate::Resettable for CTRLB_SPEC {
169    const RESET_VALUE: Self::Ux = 0;
170}
atsaml21j18bu/dac/ctrlb.rs

atsaml21j18bu/dac/
ctrlb.rs
