atsaml21j18b/usb/host/
intflag.rs

1#[doc = "Register `INTFLAG` reader"]
2pub struct R(crate::R<INTFLAG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTFLAG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTFLAG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTFLAG` writer"]
17pub struct W(crate::W<INTFLAG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTFLAG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTFLAG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HSOF` reader - Host Start Of Frame"]
38pub type HSOF_R = crate::BitReader<bool>;
39#[doc = "Field `HSOF` writer - Host Start Of Frame"]
40pub type HSOF_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
41#[doc = "Field `RST` reader - Bus Reset"]
42pub type RST_R = crate::BitReader<bool>;
43#[doc = "Field `RST` writer - Bus Reset"]
44pub type RST_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
45#[doc = "Field `WAKEUP` reader - Wake Up"]
46pub type WAKEUP_R = crate::BitReader<bool>;
47#[doc = "Field `WAKEUP` writer - Wake Up"]
48pub type WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
49#[doc = "Field `DNRSM` reader - Downstream"]
50pub type DNRSM_R = crate::BitReader<bool>;
51#[doc = "Field `DNRSM` writer - Downstream"]
52pub type DNRSM_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
53#[doc = "Field `UPRSM` reader - Upstream Resume from the Device"]
54pub type UPRSM_R = crate::BitReader<bool>;
55#[doc = "Field `UPRSM` writer - Upstream Resume from the Device"]
56pub type UPRSM_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
57#[doc = "Field `RAMACER` reader - Ram Access"]
58pub type RAMACER_R = crate::BitReader<bool>;
59#[doc = "Field `RAMACER` writer - Ram Access"]
60pub type RAMACER_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
61#[doc = "Field `DCONN` reader - Device Connection"]
62pub type DCONN_R = crate::BitReader<bool>;
63#[doc = "Field `DCONN` writer - Device Connection"]
64pub type DCONN_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
65#[doc = "Field `DDISC` reader - Device Disconnection"]
66pub type DDISC_R = crate::BitReader<bool>;
67#[doc = "Field `DDISC` writer - Device Disconnection"]
68pub type DDISC_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTFLAG_SPEC, bool, O>;
69impl R {
70    #[doc = "Bit 2 - Host Start Of Frame"]
71    #[inline(always)]
72    pub fn hsof(&self) -> HSOF_R {
73        HSOF_R::new(((self.bits >> 2) & 1) != 0)
74    }
75    #[doc = "Bit 3 - Bus Reset"]
76    #[inline(always)]
77    pub fn rst(&self) -> RST_R {
78        RST_R::new(((self.bits >> 3) & 1) != 0)
79    }
80    #[doc = "Bit 4 - Wake Up"]
81    #[inline(always)]
82    pub fn wakeup(&self) -> WAKEUP_R {
83        WAKEUP_R::new(((self.bits >> 4) & 1) != 0)
84    }
85    #[doc = "Bit 5 - Downstream"]
86    #[inline(always)]
87    pub fn dnrsm(&self) -> DNRSM_R {
88        DNRSM_R::new(((self.bits >> 5) & 1) != 0)
89    }
90    #[doc = "Bit 6 - Upstream Resume from the Device"]
91    #[inline(always)]
92    pub fn uprsm(&self) -> UPRSM_R {
93        UPRSM_R::new(((self.bits >> 6) & 1) != 0)
94    }
95    #[doc = "Bit 7 - Ram Access"]
96    #[inline(always)]
97    pub fn ramacer(&self) -> RAMACER_R {
98        RAMACER_R::new(((self.bits >> 7) & 1) != 0)
99    }
100    #[doc = "Bit 8 - Device Connection"]
101    #[inline(always)]
102    pub fn dconn(&self) -> DCONN_R {
103        DCONN_R::new(((self.bits >> 8) & 1) != 0)
104    }
105    #[doc = "Bit 9 - Device Disconnection"]
106    #[inline(always)]
107    pub fn ddisc(&self) -> DDISC_R {
108        DDISC_R::new(((self.bits >> 9) & 1) != 0)
109    }
110}
111impl W {
112    #[doc = "Bit 2 - Host Start Of Frame"]
113    #[inline(always)]
114    #[must_use]
115    pub fn hsof(&mut self) -> HSOF_W<2> {
116        HSOF_W::new(self)
117    }
118    #[doc = "Bit 3 - Bus Reset"]
119    #[inline(always)]
120    #[must_use]
121    pub fn rst(&mut self) -> RST_W<3> {
122        RST_W::new(self)
123    }
124    #[doc = "Bit 4 - Wake Up"]
125    #[inline(always)]
126    #[must_use]
127    pub fn wakeup(&mut self) -> WAKEUP_W<4> {
128        WAKEUP_W::new(self)
129    }
130    #[doc = "Bit 5 - Downstream"]
131    #[inline(always)]
132    #[must_use]
133    pub fn dnrsm(&mut self) -> DNRSM_W<5> {
134        DNRSM_W::new(self)
135    }
136    #[doc = "Bit 6 - Upstream Resume from the Device"]
137    #[inline(always)]
138    #[must_use]
139    pub fn uprsm(&mut self) -> UPRSM_W<6> {
140        UPRSM_W::new(self)
141    }
142    #[doc = "Bit 7 - Ram Access"]
143    #[inline(always)]
144    #[must_use]
145    pub fn ramacer(&mut self) -> RAMACER_W<7> {
146        RAMACER_W::new(self)
147    }
148    #[doc = "Bit 8 - Device Connection"]
149    #[inline(always)]
150    #[must_use]
151    pub fn dconn(&mut self) -> DCONN_W<8> {
152        DCONN_W::new(self)
153    }
154    #[doc = "Bit 9 - Device Disconnection"]
155    #[inline(always)]
156    #[must_use]
157    pub fn ddisc(&mut self) -> DDISC_W<9> {
158        DDISC_W::new(self)
159    }
160    #[doc = "Writes raw bits to the register."]
161    #[inline(always)]
162    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
163        self.0.bits(bits);
164        self
165    }
166}
167#[doc = "HOST Host Interrupt Flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
168pub struct INTFLAG_SPEC;
169impl crate::RegisterSpec for INTFLAG_SPEC {
170    type Ux = u16;
171}
172#[doc = "`read()` method returns [intflag::R](R) reader structure"]
173impl crate::Readable for INTFLAG_SPEC {
174    type Reader = R;
175}
176#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
177impl crate::Writable for INTFLAG_SPEC {
178    type Writer = W;
179    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
180    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
181}
182#[doc = "`reset()` method sets INTFLAG to value 0"]
183impl crate::Resettable for INTFLAG_SPEC {
184    const RESET_VALUE: Self::Ux = 0;
185}
atsaml21j18b/usb/host/intflag.rs

atsaml21j18b/usb/host/
intflag.rs
