atsaml21j18b/rtc/mode1/
ctrla.rs1#[doc = "Register `CTRLA` reader"]
2pub struct R(crate::R<CTRLA_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLA_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLA_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLA` writer"]
17pub struct W(crate::W<CTRLA_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLA_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLA_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SWRST` writer - Software Reset"]
38pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u16, CTRLA_SPEC, bool, O>;
39#[doc = "Field `ENABLE` reader - Enable"]
40pub type ENABLE_R = crate::BitReader<bool>;
41#[doc = "Field `ENABLE` writer - Enable"]
42pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u16, CTRLA_SPEC, bool, O>;
43#[doc = "Field `MODE` reader - Operating Mode"]
44pub type MODE_R = crate::FieldReader<u8, MODESELECT_A>;
45#[doc = "Operating Mode\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47#[repr(u8)]
48pub enum MODESELECT_A {
49 #[doc = "0: Mode 0: 32-bit Counter"]
50 COUNT32 = 0,
51 #[doc = "1: Mode 1: 16-bit Counter"]
52 COUNT16 = 1,
53 #[doc = "2: Mode 2: Clock/Calendar"]
54 CLOCK = 2,
55}
56impl From<MODESELECT_A> for u8 {
57 #[inline(always)]
58 fn from(variant: MODESELECT_A) -> Self {
59 variant as _
60 }
61}
62impl MODE_R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> Option<MODESELECT_A> {
66 match self.bits {
67 0 => Some(MODESELECT_A::COUNT32),
68 1 => Some(MODESELECT_A::COUNT16),
69 2 => Some(MODESELECT_A::CLOCK),
70 _ => None,
71 }
72 }
73 #[doc = "Checks if the value of the field is `COUNT32`"]
74 #[inline(always)]
75 pub fn is_count32(&self) -> bool {
76 *self == MODESELECT_A::COUNT32
77 }
78 #[doc = "Checks if the value of the field is `COUNT16`"]
79 #[inline(always)]
80 pub fn is_count16(&self) -> bool {
81 *self == MODESELECT_A::COUNT16
82 }
83 #[doc = "Checks if the value of the field is `CLOCK`"]
84 #[inline(always)]
85 pub fn is_clock(&self) -> bool {
86 *self == MODESELECT_A::CLOCK
87 }
88}
89#[doc = "Field `MODE` writer - Operating Mode"]
90pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u16, CTRLA_SPEC, u8, MODESELECT_A, 2, O>;
91impl<'a, const O: u8> MODE_W<'a, O> {
92 #[doc = "Mode 0: 32-bit Counter"]
93 #[inline(always)]
94 pub fn count32(self) -> &'a mut W {
95 self.variant(MODESELECT_A::COUNT32)
96 }
97 #[doc = "Mode 1: 16-bit Counter"]
98 #[inline(always)]
99 pub fn count16(self) -> &'a mut W {
100 self.variant(MODESELECT_A::COUNT16)
101 }
102 #[doc = "Mode 2: Clock/Calendar"]
103 #[inline(always)]
104 pub fn clock(self) -> &'a mut W {
105 self.variant(MODESELECT_A::CLOCK)
106 }
107}
108#[doc = "Field `PRESCALER` reader - Prescaler"]
109pub type PRESCALER_R = crate::FieldReader<u8, PRESCALERSELECT_A>;
110#[doc = "Prescaler\n\nValue on reset: 0"]
111#[derive(Clone, Copy, Debug, PartialEq, Eq)]
112#[repr(u8)]
113pub enum PRESCALERSELECT_A {
114 #[doc = "0: CLK_RTC_CNT = GCLK_RTC/1"]
115 OFF = 0,
116 #[doc = "1: CLK_RTC_CNT = GCLK_RTC/1"]
117 DIV1 = 1,
118 #[doc = "2: CLK_RTC_CNT = GCLK_RTC/2"]
119 DIV2 = 2,
120 #[doc = "3: CLK_RTC_CNT = GCLK_RTC/4"]
121 DIV4 = 3,
122 #[doc = "4: CLK_RTC_CNT = GCLK_RTC/8"]
123 DIV8 = 4,
124 #[doc = "5: CLK_RTC_CNT = GCLK_RTC/16"]
125 DIV16 = 5,
126 #[doc = "6: CLK_RTC_CNT = GCLK_RTC/32"]
127 DIV32 = 6,
128 #[doc = "7: CLK_RTC_CNT = GCLK_RTC/64"]
129 DIV64 = 7,
130 #[doc = "8: CLK_RTC_CNT = GCLK_RTC/128"]
131 DIV128 = 8,
132 #[doc = "9: CLK_RTC_CNT = GCLK_RTC/256"]
133 DIV256 = 9,
134 #[doc = "10: CLK_RTC_CNT = GCLK_RTC/512"]
135 DIV512 = 10,
136 #[doc = "11: CLK_RTC_CNT = GCLK_RTC/1024"]
137 DIV1024 = 11,
138}
139impl From<PRESCALERSELECT_A> for u8 {
140 #[inline(always)]
141 fn from(variant: PRESCALERSELECT_A) -> Self {
142 variant as _
143 }
144}
145impl PRESCALER_R {
146 #[doc = "Get enumerated values variant"]
147 #[inline(always)]
148 pub fn variant(&self) -> Option<PRESCALERSELECT_A> {
149 match self.bits {
150 0 => Some(PRESCALERSELECT_A::OFF),
151 1 => Some(PRESCALERSELECT_A::DIV1),
152 2 => Some(PRESCALERSELECT_A::DIV2),
153 3 => Some(PRESCALERSELECT_A::DIV4),
154 4 => Some(PRESCALERSELECT_A::DIV8),
155 5 => Some(PRESCALERSELECT_A::DIV16),
156 6 => Some(PRESCALERSELECT_A::DIV32),
157 7 => Some(PRESCALERSELECT_A::DIV64),
158 8 => Some(PRESCALERSELECT_A::DIV128),
159 9 => Some(PRESCALERSELECT_A::DIV256),
160 10 => Some(PRESCALERSELECT_A::DIV512),
161 11 => Some(PRESCALERSELECT_A::DIV1024),
162 _ => None,
163 }
164 }
165 #[doc = "Checks if the value of the field is `OFF`"]
166 #[inline(always)]
167 pub fn is_off(&self) -> bool {
168 *self == PRESCALERSELECT_A::OFF
169 }
170 #[doc = "Checks if the value of the field is `DIV1`"]
171 #[inline(always)]
172 pub fn is_div1(&self) -> bool {
173 *self == PRESCALERSELECT_A::DIV1
174 }
175 #[doc = "Checks if the value of the field is `DIV2`"]
176 #[inline(always)]
177 pub fn is_div2(&self) -> bool {
178 *self == PRESCALERSELECT_A::DIV2
179 }
180 #[doc = "Checks if the value of the field is `DIV4`"]
181 #[inline(always)]
182 pub fn is_div4(&self) -> bool {
183 *self == PRESCALERSELECT_A::DIV4
184 }
185 #[doc = "Checks if the value of the field is `DIV8`"]
186 #[inline(always)]
187 pub fn is_div8(&self) -> bool {
188 *self == PRESCALERSELECT_A::DIV8
189 }
190 #[doc = "Checks if the value of the field is `DIV16`"]
191 #[inline(always)]
192 pub fn is_div16(&self) -> bool {
193 *self == PRESCALERSELECT_A::DIV16
194 }
195 #[doc = "Checks if the value of the field is `DIV32`"]
196 #[inline(always)]
197 pub fn is_div32(&self) -> bool {
198 *self == PRESCALERSELECT_A::DIV32
199 }
200 #[doc = "Checks if the value of the field is `DIV64`"]
201 #[inline(always)]
202 pub fn is_div64(&self) -> bool {
203 *self == PRESCALERSELECT_A::DIV64
204 }
205 #[doc = "Checks if the value of the field is `DIV128`"]
206 #[inline(always)]
207 pub fn is_div128(&self) -> bool {
208 *self == PRESCALERSELECT_A::DIV128
209 }
210 #[doc = "Checks if the value of the field is `DIV256`"]
211 #[inline(always)]
212 pub fn is_div256(&self) -> bool {
213 *self == PRESCALERSELECT_A::DIV256
214 }
215 #[doc = "Checks if the value of the field is `DIV512`"]
216 #[inline(always)]
217 pub fn is_div512(&self) -> bool {
218 *self == PRESCALERSELECT_A::DIV512
219 }
220 #[doc = "Checks if the value of the field is `DIV1024`"]
221 #[inline(always)]
222 pub fn is_div1024(&self) -> bool {
223 *self == PRESCALERSELECT_A::DIV1024
224 }
225}
226#[doc = "Field `PRESCALER` writer - Prescaler"]
227pub type PRESCALER_W<'a, const O: u8> =
228 crate::FieldWriter<'a, u16, CTRLA_SPEC, u8, PRESCALERSELECT_A, 4, O>;
229impl<'a, const O: u8> PRESCALER_W<'a, O> {
230 #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
231 #[inline(always)]
232 pub fn off(self) -> &'a mut W {
233 self.variant(PRESCALERSELECT_A::OFF)
234 }
235 #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
236 #[inline(always)]
237 pub fn div1(self) -> &'a mut W {
238 self.variant(PRESCALERSELECT_A::DIV1)
239 }
240 #[doc = "CLK_RTC_CNT = GCLK_RTC/2"]
241 #[inline(always)]
242 pub fn div2(self) -> &'a mut W {
243 self.variant(PRESCALERSELECT_A::DIV2)
244 }
245 #[doc = "CLK_RTC_CNT = GCLK_RTC/4"]
246 #[inline(always)]
247 pub fn div4(self) -> &'a mut W {
248 self.variant(PRESCALERSELECT_A::DIV4)
249 }
250 #[doc = "CLK_RTC_CNT = GCLK_RTC/8"]
251 #[inline(always)]
252 pub fn div8(self) -> &'a mut W {
253 self.variant(PRESCALERSELECT_A::DIV8)
254 }
255 #[doc = "CLK_RTC_CNT = GCLK_RTC/16"]
256 #[inline(always)]
257 pub fn div16(self) -> &'a mut W {
258 self.variant(PRESCALERSELECT_A::DIV16)
259 }
260 #[doc = "CLK_RTC_CNT = GCLK_RTC/32"]
261 #[inline(always)]
262 pub fn div32(self) -> &'a mut W {
263 self.variant(PRESCALERSELECT_A::DIV32)
264 }
265 #[doc = "CLK_RTC_CNT = GCLK_RTC/64"]
266 #[inline(always)]
267 pub fn div64(self) -> &'a mut W {
268 self.variant(PRESCALERSELECT_A::DIV64)
269 }
270 #[doc = "CLK_RTC_CNT = GCLK_RTC/128"]
271 #[inline(always)]
272 pub fn div128(self) -> &'a mut W {
273 self.variant(PRESCALERSELECT_A::DIV128)
274 }
275 #[doc = "CLK_RTC_CNT = GCLK_RTC/256"]
276 #[inline(always)]
277 pub fn div256(self) -> &'a mut W {
278 self.variant(PRESCALERSELECT_A::DIV256)
279 }
280 #[doc = "CLK_RTC_CNT = GCLK_RTC/512"]
281 #[inline(always)]
282 pub fn div512(self) -> &'a mut W {
283 self.variant(PRESCALERSELECT_A::DIV512)
284 }
285 #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"]
286 #[inline(always)]
287 pub fn div1024(self) -> &'a mut W {
288 self.variant(PRESCALERSELECT_A::DIV1024)
289 }
290}
291#[doc = "Field `COUNTSYNC` reader - Count Read Synchronization Enable"]
292pub type COUNTSYNC_R = crate::BitReader<bool>;
293#[doc = "Field `COUNTSYNC` writer - Count Read Synchronization Enable"]
294pub type COUNTSYNC_W<'a, const O: u8> = crate::BitWriter<'a, u16, CTRLA_SPEC, bool, O>;
295impl R {
296 #[doc = "Bit 1 - Enable"]
297 #[inline(always)]
298 pub fn enable(&self) -> ENABLE_R {
299 ENABLE_R::new(((self.bits >> 1) & 1) != 0)
300 }
301 #[doc = "Bits 2:3 - Operating Mode"]
302 #[inline(always)]
303 pub fn mode(&self) -> MODE_R {
304 MODE_R::new(((self.bits >> 2) & 3) as u8)
305 }
306 #[doc = "Bits 8:11 - Prescaler"]
307 #[inline(always)]
308 pub fn prescaler(&self) -> PRESCALER_R {
309 PRESCALER_R::new(((self.bits >> 8) & 0x0f) as u8)
310 }
311 #[doc = "Bit 15 - Count Read Synchronization Enable"]
312 #[inline(always)]
313 pub fn countsync(&self) -> COUNTSYNC_R {
314 COUNTSYNC_R::new(((self.bits >> 15) & 1) != 0)
315 }
316}
317impl W {
318 #[doc = "Bit 0 - Software Reset"]
319 #[inline(always)]
320 #[must_use]
321 pub fn swrst(&mut self) -> SWRST_W<0> {
322 SWRST_W::new(self)
323 }
324 #[doc = "Bit 1 - Enable"]
325 #[inline(always)]
326 #[must_use]
327 pub fn enable(&mut self) -> ENABLE_W<1> {
328 ENABLE_W::new(self)
329 }
330 #[doc = "Bits 2:3 - Operating Mode"]
331 #[inline(always)]
332 #[must_use]
333 pub fn mode(&mut self) -> MODE_W<2> {
334 MODE_W::new(self)
335 }
336 #[doc = "Bits 8:11 - Prescaler"]
337 #[inline(always)]
338 #[must_use]
339 pub fn prescaler(&mut self) -> PRESCALER_W<8> {
340 PRESCALER_W::new(self)
341 }
342 #[doc = "Bit 15 - Count Read Synchronization Enable"]
343 #[inline(always)]
344 #[must_use]
345 pub fn countsync(&mut self) -> COUNTSYNC_W<15> {
346 COUNTSYNC_W::new(self)
347 }
348 #[doc = "Writes raw bits to the register."]
349 #[inline(always)]
350 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
351 self.0.bits(bits);
352 self
353 }
354}
355#[doc = "MODE1 Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
356pub struct CTRLA_SPEC;
357impl crate::RegisterSpec for CTRLA_SPEC {
358 type Ux = u16;
359}
360#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
361impl crate::Readable for CTRLA_SPEC {
362 type Reader = R;
363}
364#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
365impl crate::Writable for CTRLA_SPEC {
366 type Writer = W;
367 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
368 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
369}
370#[doc = "`reset()` method sets CTRLA to value 0"]
371impl crate::Resettable for CTRLA_SPEC {
372 const RESET_VALUE: Self::Ux = 0;
373}