atsaml21j17b/dsu/
memtype.rs

1#[doc = "Register `MEMTYPE` reader"]
2pub struct R(crate::R<MEMTYPE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MEMTYPE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MEMTYPE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MEMTYPE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `SMEMP` reader - System Memory Present"]
17pub type SMEMP_R = crate::BitReader<bool>;
18impl R {
19    #[doc = "Bit 0 - System Memory Present"]
20    #[inline(always)]
21    pub fn smemp(&self) -> SMEMP_R {
22        SMEMP_R::new((self.bits & 1) != 0)
23    }
24}
25#[doc = "Coresight ROM Table Memory Type\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [memtype](index.html) module"]
26pub struct MEMTYPE_SPEC;
27impl crate::RegisterSpec for MEMTYPE_SPEC {
28    type Ux = u32;
29}
30#[doc = "`read()` method returns [memtype::R](R) reader structure"]
31impl crate::Readable for MEMTYPE_SPEC {
32    type Reader = R;
33}
34#[doc = "`reset()` method sets MEMTYPE to value 0"]
35impl crate::Resettable for MEMTYPE_SPEC {
36    const RESET_VALUE: Self::Ux = 0;
37}
atsaml21j17b/dsu/memtype.rs

atsaml21j17b/dsu/
memtype.rs
