atsaml21e18b/tcc0/
intenclr.rs

1#[doc = "Register `INTENCLR` reader"]
2pub struct R(crate::R<INTENCLR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENCLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENCLR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENCLR` writer"]
17pub struct W(crate::W<INTENCLR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENCLR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENCLR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `OVF` reader - Overflow Interrupt Enable"]
38pub type OVF_R = crate::BitReader<bool>;
39#[doc = "Field `OVF` writer - Overflow Interrupt Enable"]
40pub type OVF_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
41#[doc = "Field `TRG` reader - Retrigger Interrupt Enable"]
42pub type TRG_R = crate::BitReader<bool>;
43#[doc = "Field `TRG` writer - Retrigger Interrupt Enable"]
44pub type TRG_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
45#[doc = "Field `CNT` reader - Counter Interrupt Enable"]
46pub type CNT_R = crate::BitReader<bool>;
47#[doc = "Field `CNT` writer - Counter Interrupt Enable"]
48pub type CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
49#[doc = "Field `ERR` reader - Error Interrupt Enable"]
50pub type ERR_R = crate::BitReader<bool>;
51#[doc = "Field `ERR` writer - Error Interrupt Enable"]
52pub type ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
53#[doc = "Field `UFS` reader - Non-Recoverable Update Fault Interrupt Enable"]
54pub type UFS_R = crate::BitReader<bool>;
55#[doc = "Field `UFS` writer - Non-Recoverable Update Fault Interrupt Enable"]
56pub type UFS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
57#[doc = "Field `DFS` reader - Non-Recoverable Debug Fault Interrupt Enable"]
58pub type DFS_R = crate::BitReader<bool>;
59#[doc = "Field `DFS` writer - Non-Recoverable Debug Fault Interrupt Enable"]
60pub type DFS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
61#[doc = "Field `FAULTA` reader - Recoverable Fault A Interrupt Enable"]
62pub type FAULTA_R = crate::BitReader<bool>;
63#[doc = "Field `FAULTA` writer - Recoverable Fault A Interrupt Enable"]
64pub type FAULTA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
65#[doc = "Field `FAULTB` reader - Recoverable Fault B Interrupt Enable"]
66pub type FAULTB_R = crate::BitReader<bool>;
67#[doc = "Field `FAULTB` writer - Recoverable Fault B Interrupt Enable"]
68pub type FAULTB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
69#[doc = "Field `FAULT0` reader - Non-Recoverable Fault 0 Interrupt Enable"]
70pub type FAULT0_R = crate::BitReader<bool>;
71#[doc = "Field `FAULT0` writer - Non-Recoverable Fault 0 Interrupt Enable"]
72pub type FAULT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
73#[doc = "Field `FAULT1` reader - Non-Recoverable Fault 1 Interrupt Enable"]
74pub type FAULT1_R = crate::BitReader<bool>;
75#[doc = "Field `FAULT1` writer - Non-Recoverable Fault 1 Interrupt Enable"]
76pub type FAULT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
77#[doc = "Field `MC0` reader - Match or Capture Channel 0 Interrupt Enable"]
78pub type MC0_R = crate::BitReader<bool>;
79#[doc = "Field `MC0` writer - Match or Capture Channel 0 Interrupt Enable"]
80pub type MC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
81#[doc = "Field `MC1` reader - Match or Capture Channel 1 Interrupt Enable"]
82pub type MC1_R = crate::BitReader<bool>;
83#[doc = "Field `MC1` writer - Match or Capture Channel 1 Interrupt Enable"]
84pub type MC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
85#[doc = "Field `MC2` reader - Match or Capture Channel 2 Interrupt Enable"]
86pub type MC2_R = crate::BitReader<bool>;
87#[doc = "Field `MC2` writer - Match or Capture Channel 2 Interrupt Enable"]
88pub type MC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
89#[doc = "Field `MC3` reader - Match or Capture Channel 3 Interrupt Enable"]
90pub type MC3_R = crate::BitReader<bool>;
91#[doc = "Field `MC3` writer - Match or Capture Channel 3 Interrupt Enable"]
92pub type MC3_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, bool, O>;
93impl R {
94    #[doc = "Bit 0 - Overflow Interrupt Enable"]
95    #[inline(always)]
96    pub fn ovf(&self) -> OVF_R {
97        OVF_R::new((self.bits & 1) != 0)
98    }
99    #[doc = "Bit 1 - Retrigger Interrupt Enable"]
100    #[inline(always)]
101    pub fn trg(&self) -> TRG_R {
102        TRG_R::new(((self.bits >> 1) & 1) != 0)
103    }
104    #[doc = "Bit 2 - Counter Interrupt Enable"]
105    #[inline(always)]
106    pub fn cnt(&self) -> CNT_R {
107        CNT_R::new(((self.bits >> 2) & 1) != 0)
108    }
109    #[doc = "Bit 3 - Error Interrupt Enable"]
110    #[inline(always)]
111    pub fn err(&self) -> ERR_R {
112        ERR_R::new(((self.bits >> 3) & 1) != 0)
113    }
114    #[doc = "Bit 10 - Non-Recoverable Update Fault Interrupt Enable"]
115    #[inline(always)]
116    pub fn ufs(&self) -> UFS_R {
117        UFS_R::new(((self.bits >> 10) & 1) != 0)
118    }
119    #[doc = "Bit 11 - Non-Recoverable Debug Fault Interrupt Enable"]
120    #[inline(always)]
121    pub fn dfs(&self) -> DFS_R {
122        DFS_R::new(((self.bits >> 11) & 1) != 0)
123    }
124    #[doc = "Bit 12 - Recoverable Fault A Interrupt Enable"]
125    #[inline(always)]
126    pub fn faulta(&self) -> FAULTA_R {
127        FAULTA_R::new(((self.bits >> 12) & 1) != 0)
128    }
129    #[doc = "Bit 13 - Recoverable Fault B Interrupt Enable"]
130    #[inline(always)]
131    pub fn faultb(&self) -> FAULTB_R {
132        FAULTB_R::new(((self.bits >> 13) & 1) != 0)
133    }
134    #[doc = "Bit 14 - Non-Recoverable Fault 0 Interrupt Enable"]
135    #[inline(always)]
136    pub fn fault0(&self) -> FAULT0_R {
137        FAULT0_R::new(((self.bits >> 14) & 1) != 0)
138    }
139    #[doc = "Bit 15 - Non-Recoverable Fault 1 Interrupt Enable"]
140    #[inline(always)]
141    pub fn fault1(&self) -> FAULT1_R {
142        FAULT1_R::new(((self.bits >> 15) & 1) != 0)
143    }
144    #[doc = "Bit 16 - Match or Capture Channel 0 Interrupt Enable"]
145    #[inline(always)]
146    pub fn mc0(&self) -> MC0_R {
147        MC0_R::new(((self.bits >> 16) & 1) != 0)
148    }
149    #[doc = "Bit 17 - Match or Capture Channel 1 Interrupt Enable"]
150    #[inline(always)]
151    pub fn mc1(&self) -> MC1_R {
152        MC1_R::new(((self.bits >> 17) & 1) != 0)
153    }
154    #[doc = "Bit 18 - Match or Capture Channel 2 Interrupt Enable"]
155    #[inline(always)]
156    pub fn mc2(&self) -> MC2_R {
157        MC2_R::new(((self.bits >> 18) & 1) != 0)
158    }
159    #[doc = "Bit 19 - Match or Capture Channel 3 Interrupt Enable"]
160    #[inline(always)]
161    pub fn mc3(&self) -> MC3_R {
162        MC3_R::new(((self.bits >> 19) & 1) != 0)
163    }
164}
165impl W {
166    #[doc = "Bit 0 - Overflow Interrupt Enable"]
167    #[inline(always)]
168    #[must_use]
169    pub fn ovf(&mut self) -> OVF_W<0> {
170        OVF_W::new(self)
171    }
172    #[doc = "Bit 1 - Retrigger Interrupt Enable"]
173    #[inline(always)]
174    #[must_use]
175    pub fn trg(&mut self) -> TRG_W<1> {
176        TRG_W::new(self)
177    }
178    #[doc = "Bit 2 - Counter Interrupt Enable"]
179    #[inline(always)]
180    #[must_use]
181    pub fn cnt(&mut self) -> CNT_W<2> {
182        CNT_W::new(self)
183    }
184    #[doc = "Bit 3 - Error Interrupt Enable"]
185    #[inline(always)]
186    #[must_use]
187    pub fn err(&mut self) -> ERR_W<3> {
188        ERR_W::new(self)
189    }
190    #[doc = "Bit 10 - Non-Recoverable Update Fault Interrupt Enable"]
191    #[inline(always)]
192    #[must_use]
193    pub fn ufs(&mut self) -> UFS_W<10> {
194        UFS_W::new(self)
195    }
196    #[doc = "Bit 11 - Non-Recoverable Debug Fault Interrupt Enable"]
197    #[inline(always)]
198    #[must_use]
199    pub fn dfs(&mut self) -> DFS_W<11> {
200        DFS_W::new(self)
201    }
202    #[doc = "Bit 12 - Recoverable Fault A Interrupt Enable"]
203    #[inline(always)]
204    #[must_use]
205    pub fn faulta(&mut self) -> FAULTA_W<12> {
206        FAULTA_W::new(self)
207    }
208    #[doc = "Bit 13 - Recoverable Fault B Interrupt Enable"]
209    #[inline(always)]
210    #[must_use]
211    pub fn faultb(&mut self) -> FAULTB_W<13> {
212        FAULTB_W::new(self)
213    }
214    #[doc = "Bit 14 - Non-Recoverable Fault 0 Interrupt Enable"]
215    #[inline(always)]
216    #[must_use]
217    pub fn fault0(&mut self) -> FAULT0_W<14> {
218        FAULT0_W::new(self)
219    }
220    #[doc = "Bit 15 - Non-Recoverable Fault 1 Interrupt Enable"]
221    #[inline(always)]
222    #[must_use]
223    pub fn fault1(&mut self) -> FAULT1_W<15> {
224        FAULT1_W::new(self)
225    }
226    #[doc = "Bit 16 - Match or Capture Channel 0 Interrupt Enable"]
227    #[inline(always)]
228    #[must_use]
229    pub fn mc0(&mut self) -> MC0_W<16> {
230        MC0_W::new(self)
231    }
232    #[doc = "Bit 17 - Match or Capture Channel 1 Interrupt Enable"]
233    #[inline(always)]
234    #[must_use]
235    pub fn mc1(&mut self) -> MC1_W<17> {
236        MC1_W::new(self)
237    }
238    #[doc = "Bit 18 - Match or Capture Channel 2 Interrupt Enable"]
239    #[inline(always)]
240    #[must_use]
241    pub fn mc2(&mut self) -> MC2_W<18> {
242        MC2_W::new(self)
243    }
244    #[doc = "Bit 19 - Match or Capture Channel 3 Interrupt Enable"]
245    #[inline(always)]
246    #[must_use]
247    pub fn mc3(&mut self) -> MC3_W<19> {
248        MC3_W::new(self)
249    }
250    #[doc = "Writes raw bits to the register."]
251    #[inline(always)]
252    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
253        self.0.bits(bits);
254        self
255    }
256}
257#[doc = "Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
258pub struct INTENCLR_SPEC;
259impl crate::RegisterSpec for INTENCLR_SPEC {
260    type Ux = u32;
261}
262#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
263impl crate::Readable for INTENCLR_SPEC {
264    type Reader = R;
265}
266#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
267impl crate::Writable for INTENCLR_SPEC {
268    type Writer = W;
269    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
270    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
271}
272#[doc = "`reset()` method sets INTENCLR to value 0"]
273impl crate::Resettable for INTENCLR_SPEC {
274    const RESET_VALUE: Self::Ux = 0;
275}