atsaml21e18b/opamp/
opampctrl.rs1#[doc = "Register `OPAMPCTRL%s` reader"]
2pub struct R(crate::R<OPAMPCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<OPAMPCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<OPAMPCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<OPAMPCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `OPAMPCTRL%s` writer"]
17pub struct W(crate::W<OPAMPCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<OPAMPCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<OPAMPCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<OPAMPCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `ENABLE` reader - Operational Amplifier Enable"]
38pub type ENABLE_R = crate::BitReader<bool>;
39#[doc = "Field `ENABLE` writer - Operational Amplifier Enable"]
40pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
41#[doc = "Field `ANAOUT` reader - Analog Output"]
42pub type ANAOUT_R = crate::BitReader<bool>;
43#[doc = "Field `ANAOUT` writer - Analog Output"]
44pub type ANAOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
45#[doc = "Field `BIAS` reader - Bias Selection"]
46pub type BIAS_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `BIAS` writer - Bias Selection"]
48pub type BIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OPAMPCTRL_SPEC, u8, u8, 2, O>;
49#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
50pub type RUNSTDBY_R = crate::BitReader<bool>;
51#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
52pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
53#[doc = "Field `ONDEMAND` reader - On Demand Control"]
54pub type ONDEMAND_R = crate::BitReader<bool>;
55#[doc = "Field `ONDEMAND` writer - On Demand Control"]
56pub type ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
57#[doc = "Field `RES2OUT` reader - Resistor ladder To Output"]
58pub type RES2OUT_R = crate::BitReader<bool>;
59#[doc = "Field `RES2OUT` writer - Resistor ladder To Output"]
60pub type RES2OUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
61#[doc = "Field `RES2VCC` reader - Resistor ladder To VCC"]
62pub type RES2VCC_R = crate::BitReader<bool>;
63#[doc = "Field `RES2VCC` writer - Resistor ladder To VCC"]
64pub type RES2VCC_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
65#[doc = "Field `RES1EN` reader - Resistor 1 Enable"]
66pub type RES1EN_R = crate::BitReader<bool>;
67#[doc = "Field `RES1EN` writer - Resistor 1 Enable"]
68pub type RES1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPAMPCTRL_SPEC, bool, O>;
69#[doc = "Field `RES1MUX` reader - Resistor 1 Mux"]
70pub type RES1MUX_R = crate::FieldReader<u8, u8>;
71#[doc = "Field `RES1MUX` writer - Resistor 1 Mux"]
72pub type RES1MUX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OPAMPCTRL_SPEC, u8, u8, 2, O>;
73#[doc = "Field `POTMUX` reader - Potentiometer Selection"]
74pub type POTMUX_R = crate::FieldReader<u8, u8>;
75#[doc = "Field `POTMUX` writer - Potentiometer Selection"]
76pub type POTMUX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OPAMPCTRL_SPEC, u8, u8, 3, O>;
77#[doc = "Field `MUXPOS` reader - Positive Input Mux Selection"]
78pub type MUXPOS_R = crate::FieldReader<u8, u8>;
79#[doc = "Field `MUXPOS` writer - Positive Input Mux Selection"]
80pub type MUXPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OPAMPCTRL_SPEC, u8, u8, 3, O>;
81#[doc = "Field `MUXNEG` reader - Negative Input Mux Selection"]
82pub type MUXNEG_R = crate::FieldReader<u8, u8>;
83#[doc = "Field `MUXNEG` writer - Negative Input Mux Selection"]
84pub type MUXNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OPAMPCTRL_SPEC, u8, u8, 3, O>;
85impl R {
86 #[doc = "Bit 1 - Operational Amplifier Enable"]
87 #[inline(always)]
88 pub fn enable(&self) -> ENABLE_R {
89 ENABLE_R::new(((self.bits >> 1) & 1) != 0)
90 }
91 #[doc = "Bit 2 - Analog Output"]
92 #[inline(always)]
93 pub fn anaout(&self) -> ANAOUT_R {
94 ANAOUT_R::new(((self.bits >> 2) & 1) != 0)
95 }
96 #[doc = "Bits 3:4 - Bias Selection"]
97 #[inline(always)]
98 pub fn bias(&self) -> BIAS_R {
99 BIAS_R::new(((self.bits >> 3) & 3) as u8)
100 }
101 #[doc = "Bit 6 - Run in Standby"]
102 #[inline(always)]
103 pub fn runstdby(&self) -> RUNSTDBY_R {
104 RUNSTDBY_R::new(((self.bits >> 6) & 1) != 0)
105 }
106 #[doc = "Bit 7 - On Demand Control"]
107 #[inline(always)]
108 pub fn ondemand(&self) -> ONDEMAND_R {
109 ONDEMAND_R::new(((self.bits >> 7) & 1) != 0)
110 }
111 #[doc = "Bit 8 - Resistor ladder To Output"]
112 #[inline(always)]
113 pub fn res2out(&self) -> RES2OUT_R {
114 RES2OUT_R::new(((self.bits >> 8) & 1) != 0)
115 }
116 #[doc = "Bit 9 - Resistor ladder To VCC"]
117 #[inline(always)]
118 pub fn res2vcc(&self) -> RES2VCC_R {
119 RES2VCC_R::new(((self.bits >> 9) & 1) != 0)
120 }
121 #[doc = "Bit 10 - Resistor 1 Enable"]
122 #[inline(always)]
123 pub fn res1en(&self) -> RES1EN_R {
124 RES1EN_R::new(((self.bits >> 10) & 1) != 0)
125 }
126 #[doc = "Bits 11:12 - Resistor 1 Mux"]
127 #[inline(always)]
128 pub fn res1mux(&self) -> RES1MUX_R {
129 RES1MUX_R::new(((self.bits >> 11) & 3) as u8)
130 }
131 #[doc = "Bits 13:15 - Potentiometer Selection"]
132 #[inline(always)]
133 pub fn potmux(&self) -> POTMUX_R {
134 POTMUX_R::new(((self.bits >> 13) & 7) as u8)
135 }
136 #[doc = "Bits 16:18 - Positive Input Mux Selection"]
137 #[inline(always)]
138 pub fn muxpos(&self) -> MUXPOS_R {
139 MUXPOS_R::new(((self.bits >> 16) & 7) as u8)
140 }
141 #[doc = "Bits 20:22 - Negative Input Mux Selection"]
142 #[inline(always)]
143 pub fn muxneg(&self) -> MUXNEG_R {
144 MUXNEG_R::new(((self.bits >> 20) & 7) as u8)
145 }
146}
147impl W {
148 #[doc = "Bit 1 - Operational Amplifier Enable"]
149 #[inline(always)]
150 #[must_use]
151 pub fn enable(&mut self) -> ENABLE_W<1> {
152 ENABLE_W::new(self)
153 }
154 #[doc = "Bit 2 - Analog Output"]
155 #[inline(always)]
156 #[must_use]
157 pub fn anaout(&mut self) -> ANAOUT_W<2> {
158 ANAOUT_W::new(self)
159 }
160 #[doc = "Bits 3:4 - Bias Selection"]
161 #[inline(always)]
162 #[must_use]
163 pub fn bias(&mut self) -> BIAS_W<3> {
164 BIAS_W::new(self)
165 }
166 #[doc = "Bit 6 - Run in Standby"]
167 #[inline(always)]
168 #[must_use]
169 pub fn runstdby(&mut self) -> RUNSTDBY_W<6> {
170 RUNSTDBY_W::new(self)
171 }
172 #[doc = "Bit 7 - On Demand Control"]
173 #[inline(always)]
174 #[must_use]
175 pub fn ondemand(&mut self) -> ONDEMAND_W<7> {
176 ONDEMAND_W::new(self)
177 }
178 #[doc = "Bit 8 - Resistor ladder To Output"]
179 #[inline(always)]
180 #[must_use]
181 pub fn res2out(&mut self) -> RES2OUT_W<8> {
182 RES2OUT_W::new(self)
183 }
184 #[doc = "Bit 9 - Resistor ladder To VCC"]
185 #[inline(always)]
186 #[must_use]
187 pub fn res2vcc(&mut self) -> RES2VCC_W<9> {
188 RES2VCC_W::new(self)
189 }
190 #[doc = "Bit 10 - Resistor 1 Enable"]
191 #[inline(always)]
192 #[must_use]
193 pub fn res1en(&mut self) -> RES1EN_W<10> {
194 RES1EN_W::new(self)
195 }
196 #[doc = "Bits 11:12 - Resistor 1 Mux"]
197 #[inline(always)]
198 #[must_use]
199 pub fn res1mux(&mut self) -> RES1MUX_W<11> {
200 RES1MUX_W::new(self)
201 }
202 #[doc = "Bits 13:15 - Potentiometer Selection"]
203 #[inline(always)]
204 #[must_use]
205 pub fn potmux(&mut self) -> POTMUX_W<13> {
206 POTMUX_W::new(self)
207 }
208 #[doc = "Bits 16:18 - Positive Input Mux Selection"]
209 #[inline(always)]
210 #[must_use]
211 pub fn muxpos(&mut self) -> MUXPOS_W<16> {
212 MUXPOS_W::new(self)
213 }
214 #[doc = "Bits 20:22 - Negative Input Mux Selection"]
215 #[inline(always)]
216 #[must_use]
217 pub fn muxneg(&mut self) -> MUXNEG_W<20> {
218 MUXNEG_W::new(self)
219 }
220 #[doc = "Writes raw bits to the register."]
221 #[inline(always)]
222 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
223 self.0.bits(bits);
224 self
225 }
226}
227#[doc = "OPAMP n Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opampctrl](index.html) module"]
228pub struct OPAMPCTRL_SPEC;
229impl crate::RegisterSpec for OPAMPCTRL_SPEC {
230 type Ux = u32;
231}
232#[doc = "`read()` method returns [opampctrl::R](R) reader structure"]
233impl crate::Readable for OPAMPCTRL_SPEC {
234 type Reader = R;
235}
236#[doc = "`write(|w| ..)` method takes [opampctrl::W](W) writer structure"]
237impl crate::Writable for OPAMPCTRL_SPEC {
238 type Writer = W;
239 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
241}
242#[doc = "`reset()` method sets OPAMPCTRL%s to value 0"]
243impl crate::Resettable for OPAMPCTRL_SPEC {
244 const RESET_VALUE: Self::Ux = 0;
245}