atsaml21e18b/gclk/
pchctrl.rs1#[doc = "Register `PCHCTRL%s` reader"]
2pub struct R(crate::R<PCHCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PCHCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PCHCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PCHCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PCHCTRL%s` writer"]
17pub struct W(crate::W<PCHCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PCHCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PCHCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PCHCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `GEN` reader - Generic Clock Generator"]
38pub type GEN_R = crate::FieldReader<u8, GENSELECT_A>;
39#[doc = "Generic Clock Generator\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum GENSELECT_A {
43 #[doc = "0: Generic clock generator 0"]
44 GCLK0 = 0,
45 #[doc = "1: Generic clock generator 1"]
46 GCLK1 = 1,
47 #[doc = "2: Generic clock generator 2"]
48 GCLK2 = 2,
49 #[doc = "3: Generic clock generator 3"]
50 GCLK3 = 3,
51 #[doc = "4: Generic clock generator 4"]
52 GCLK4 = 4,
53 #[doc = "5: Generic clock generator 5"]
54 GCLK5 = 5,
55 #[doc = "6: Generic clock generator 6"]
56 GCLK6 = 6,
57 #[doc = "7: Generic clock generator 7"]
58 GCLK7 = 7,
59 #[doc = "8: Generic clock generator 8"]
60 GCLK8 = 8,
61}
62impl From<GENSELECT_A> for u8 {
63 #[inline(always)]
64 fn from(variant: GENSELECT_A) -> Self {
65 variant as _
66 }
67}
68impl GEN_R {
69 #[doc = "Get enumerated values variant"]
70 #[inline(always)]
71 pub fn variant(&self) -> Option<GENSELECT_A> {
72 match self.bits {
73 0 => Some(GENSELECT_A::GCLK0),
74 1 => Some(GENSELECT_A::GCLK1),
75 2 => Some(GENSELECT_A::GCLK2),
76 3 => Some(GENSELECT_A::GCLK3),
77 4 => Some(GENSELECT_A::GCLK4),
78 5 => Some(GENSELECT_A::GCLK5),
79 6 => Some(GENSELECT_A::GCLK6),
80 7 => Some(GENSELECT_A::GCLK7),
81 8 => Some(GENSELECT_A::GCLK8),
82 _ => None,
83 }
84 }
85 #[doc = "Checks if the value of the field is `GCLK0`"]
86 #[inline(always)]
87 pub fn is_gclk0(&self) -> bool {
88 *self == GENSELECT_A::GCLK0
89 }
90 #[doc = "Checks if the value of the field is `GCLK1`"]
91 #[inline(always)]
92 pub fn is_gclk1(&self) -> bool {
93 *self == GENSELECT_A::GCLK1
94 }
95 #[doc = "Checks if the value of the field is `GCLK2`"]
96 #[inline(always)]
97 pub fn is_gclk2(&self) -> bool {
98 *self == GENSELECT_A::GCLK2
99 }
100 #[doc = "Checks if the value of the field is `GCLK3`"]
101 #[inline(always)]
102 pub fn is_gclk3(&self) -> bool {
103 *self == GENSELECT_A::GCLK3
104 }
105 #[doc = "Checks if the value of the field is `GCLK4`"]
106 #[inline(always)]
107 pub fn is_gclk4(&self) -> bool {
108 *self == GENSELECT_A::GCLK4
109 }
110 #[doc = "Checks if the value of the field is `GCLK5`"]
111 #[inline(always)]
112 pub fn is_gclk5(&self) -> bool {
113 *self == GENSELECT_A::GCLK5
114 }
115 #[doc = "Checks if the value of the field is `GCLK6`"]
116 #[inline(always)]
117 pub fn is_gclk6(&self) -> bool {
118 *self == GENSELECT_A::GCLK6
119 }
120 #[doc = "Checks if the value of the field is `GCLK7`"]
121 #[inline(always)]
122 pub fn is_gclk7(&self) -> bool {
123 *self == GENSELECT_A::GCLK7
124 }
125 #[doc = "Checks if the value of the field is `GCLK8`"]
126 #[inline(always)]
127 pub fn is_gclk8(&self) -> bool {
128 *self == GENSELECT_A::GCLK8
129 }
130}
131#[doc = "Field `GEN` writer - Generic Clock Generator"]
132pub type GEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCHCTRL_SPEC, u8, GENSELECT_A, 4, O>;
133impl<'a, const O: u8> GEN_W<'a, O> {
134 #[doc = "Generic clock generator 0"]
135 #[inline(always)]
136 pub fn gclk0(self) -> &'a mut W {
137 self.variant(GENSELECT_A::GCLK0)
138 }
139 #[doc = "Generic clock generator 1"]
140 #[inline(always)]
141 pub fn gclk1(self) -> &'a mut W {
142 self.variant(GENSELECT_A::GCLK1)
143 }
144 #[doc = "Generic clock generator 2"]
145 #[inline(always)]
146 pub fn gclk2(self) -> &'a mut W {
147 self.variant(GENSELECT_A::GCLK2)
148 }
149 #[doc = "Generic clock generator 3"]
150 #[inline(always)]
151 pub fn gclk3(self) -> &'a mut W {
152 self.variant(GENSELECT_A::GCLK3)
153 }
154 #[doc = "Generic clock generator 4"]
155 #[inline(always)]
156 pub fn gclk4(self) -> &'a mut W {
157 self.variant(GENSELECT_A::GCLK4)
158 }
159 #[doc = "Generic clock generator 5"]
160 #[inline(always)]
161 pub fn gclk5(self) -> &'a mut W {
162 self.variant(GENSELECT_A::GCLK5)
163 }
164 #[doc = "Generic clock generator 6"]
165 #[inline(always)]
166 pub fn gclk6(self) -> &'a mut W {
167 self.variant(GENSELECT_A::GCLK6)
168 }
169 #[doc = "Generic clock generator 7"]
170 #[inline(always)]
171 pub fn gclk7(self) -> &'a mut W {
172 self.variant(GENSELECT_A::GCLK7)
173 }
174 #[doc = "Generic clock generator 8"]
175 #[inline(always)]
176 pub fn gclk8(self) -> &'a mut W {
177 self.variant(GENSELECT_A::GCLK8)
178 }
179}
180#[doc = "Field `CHEN` reader - Channel Enable"]
181pub type CHEN_R = crate::BitReader<bool>;
182#[doc = "Field `CHEN` writer - Channel Enable"]
183pub type CHEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCHCTRL_SPEC, bool, O>;
184#[doc = "Field `WRTLOCK` reader - Write Lock"]
185pub type WRTLOCK_R = crate::BitReader<bool>;
186#[doc = "Field `WRTLOCK` writer - Write Lock"]
187pub type WRTLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCHCTRL_SPEC, bool, O>;
188impl R {
189 #[doc = "Bits 0:3 - Generic Clock Generator"]
190 #[inline(always)]
191 pub fn gen(&self) -> GEN_R {
192 GEN_R::new((self.bits & 0x0f) as u8)
193 }
194 #[doc = "Bit 6 - Channel Enable"]
195 #[inline(always)]
196 pub fn chen(&self) -> CHEN_R {
197 CHEN_R::new(((self.bits >> 6) & 1) != 0)
198 }
199 #[doc = "Bit 7 - Write Lock"]
200 #[inline(always)]
201 pub fn wrtlock(&self) -> WRTLOCK_R {
202 WRTLOCK_R::new(((self.bits >> 7) & 1) != 0)
203 }
204}
205impl W {
206 #[doc = "Bits 0:3 - Generic Clock Generator"]
207 #[inline(always)]
208 #[must_use]
209 pub fn gen(&mut self) -> GEN_W<0> {
210 GEN_W::new(self)
211 }
212 #[doc = "Bit 6 - Channel Enable"]
213 #[inline(always)]
214 #[must_use]
215 pub fn chen(&mut self) -> CHEN_W<6> {
216 CHEN_W::new(self)
217 }
218 #[doc = "Bit 7 - Write Lock"]
219 #[inline(always)]
220 #[must_use]
221 pub fn wrtlock(&mut self) -> WRTLOCK_W<7> {
222 WRTLOCK_W::new(self)
223 }
224 #[doc = "Writes raw bits to the register."]
225 #[inline(always)]
226 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
227 self.0.bits(bits);
228 self
229 }
230}
231#[doc = "Peripheral Clock Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pchctrl](index.html) module"]
232pub struct PCHCTRL_SPEC;
233impl crate::RegisterSpec for PCHCTRL_SPEC {
234 type Ux = u32;
235}
236#[doc = "`read()` method returns [pchctrl::R](R) reader structure"]
237impl crate::Readable for PCHCTRL_SPEC {
238 type Reader = R;
239}
240#[doc = "`write(|w| ..)` method takes [pchctrl::W](W) writer structure"]
241impl crate::Writable for PCHCTRL_SPEC {
242 type Writer = W;
243 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
245}
246#[doc = "`reset()` method sets PCHCTRL%s to value 0"]
247impl crate::Resettable for PCHCTRL_SPEC {
248 const RESET_VALUE: Self::Ux = 0;
249}