atsaml21e18a/adc/
intenset.rs

1#[doc = "Register `INTENSET` reader"]
2pub struct R(crate::R<INTENSET_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENSET_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENSET_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENSET` writer"]
17pub struct W(crate::W<INTENSET_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENSET_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENSET_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RESRDY` reader - Result Ready Interrupt Enable"]
38pub type RESRDY_R = crate::BitReader<bool>;
39#[doc = "Field `RESRDY` writer - Result Ready Interrupt Enable"]
40pub type RESRDY_W<'a, const O: u8> = crate::BitWriter<'a, u8, INTENSET_SPEC, bool, O>;
41#[doc = "Field `OVERRUN` reader - Overrun Interrupt Enable"]
42pub type OVERRUN_R = crate::BitReader<bool>;
43#[doc = "Field `OVERRUN` writer - Overrun Interrupt Enable"]
44pub type OVERRUN_W<'a, const O: u8> = crate::BitWriter<'a, u8, INTENSET_SPEC, bool, O>;
45#[doc = "Field `WINMON` reader - Window Monitor Interrupt Enable"]
46pub type WINMON_R = crate::BitReader<bool>;
47#[doc = "Field `WINMON` writer - Window Monitor Interrupt Enable"]
48pub type WINMON_W<'a, const O: u8> = crate::BitWriter<'a, u8, INTENSET_SPEC, bool, O>;
49impl R {
50    #[doc = "Bit 0 - Result Ready Interrupt Enable"]
51    #[inline(always)]
52    pub fn resrdy(&self) -> RESRDY_R {
53        RESRDY_R::new((self.bits & 1) != 0)
54    }
55    #[doc = "Bit 1 - Overrun Interrupt Enable"]
56    #[inline(always)]
57    pub fn overrun(&self) -> OVERRUN_R {
58        OVERRUN_R::new(((self.bits >> 1) & 1) != 0)
59    }
60    #[doc = "Bit 2 - Window Monitor Interrupt Enable"]
61    #[inline(always)]
62    pub fn winmon(&self) -> WINMON_R {
63        WINMON_R::new(((self.bits >> 2) & 1) != 0)
64    }
65}
66impl W {
67    #[doc = "Bit 0 - Result Ready Interrupt Enable"]
68    #[inline(always)]
69    #[must_use]
70    pub fn resrdy(&mut self) -> RESRDY_W<0> {
71        RESRDY_W::new(self)
72    }
73    #[doc = "Bit 1 - Overrun Interrupt Enable"]
74    #[inline(always)]
75    #[must_use]
76    pub fn overrun(&mut self) -> OVERRUN_W<1> {
77        OVERRUN_W::new(self)
78    }
79    #[doc = "Bit 2 - Window Monitor Interrupt Enable"]
80    #[inline(always)]
81    #[must_use]
82    pub fn winmon(&mut self) -> WINMON_W<2> {
83        WINMON_W::new(self)
84    }
85    #[doc = "Writes raw bits to the register."]
86    #[inline(always)]
87    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
88        self.0.bits(bits);
89        self
90    }
91}
92#[doc = "Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
93pub struct INTENSET_SPEC;
94impl crate::RegisterSpec for INTENSET_SPEC {
95    type Ux = u8;
96}
97#[doc = "`read()` method returns [intenset::R](R) reader structure"]
98impl crate::Readable for INTENSET_SPEC {
99    type Reader = R;
100}
101#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
102impl crate::Writable for INTENSET_SPEC {
103    type Writer = W;
104    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
105    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
106}
107#[doc = "`reset()` method sets INTENSET to value 0"]
108impl crate::Resettable for INTENSET_SPEC {
109    const RESET_VALUE: Self::Ux = 0;
110}
atsaml21e18a/adc/intenset.rs

atsaml21e18a/adc/
intenset.rs
