atsaml21e17b/usb/device/
intenset.rs1#[doc = "Register `INTENSET` reader"]
2pub struct R(crate::R<INTENSET_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<INTENSET_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<INTENSET_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `INTENSET` writer"]
17pub struct W(crate::W<INTENSET_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<INTENSET_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<INTENSET_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SUSPEND` reader - Suspend Interrupt Enable"]
38pub type SUSPEND_R = crate::BitReader<bool>;
39#[doc = "Field `SUSPEND` writer - Suspend Interrupt Enable"]
40pub type SUSPEND_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
41#[doc = "Field `MSOF` reader - Micro Start of Frame Interrupt Enable in High Speed Mode"]
42pub type MSOF_R = crate::BitReader<bool>;
43#[doc = "Field `MSOF` writer - Micro Start of Frame Interrupt Enable in High Speed Mode"]
44pub type MSOF_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
45#[doc = "Field `SOF` reader - Start Of Frame Interrupt Enable"]
46pub type SOF_R = crate::BitReader<bool>;
47#[doc = "Field `SOF` writer - Start Of Frame Interrupt Enable"]
48pub type SOF_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
49#[doc = "Field `EORST` reader - End of Reset Interrupt Enable"]
50pub type EORST_R = crate::BitReader<bool>;
51#[doc = "Field `EORST` writer - End of Reset Interrupt Enable"]
52pub type EORST_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
53#[doc = "Field `WAKEUP` reader - Wake Up Interrupt Enable"]
54pub type WAKEUP_R = crate::BitReader<bool>;
55#[doc = "Field `WAKEUP` writer - Wake Up Interrupt Enable"]
56pub type WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
57#[doc = "Field `EORSM` reader - End Of Resume Interrupt Enable"]
58pub type EORSM_R = crate::BitReader<bool>;
59#[doc = "Field `EORSM` writer - End Of Resume Interrupt Enable"]
60pub type EORSM_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
61#[doc = "Field `UPRSM` reader - Upstream Resume Interrupt Enable"]
62pub type UPRSM_R = crate::BitReader<bool>;
63#[doc = "Field `UPRSM` writer - Upstream Resume Interrupt Enable"]
64pub type UPRSM_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
65#[doc = "Field `RAMACER` reader - Ram Access Interrupt Enable"]
66pub type RAMACER_R = crate::BitReader<bool>;
67#[doc = "Field `RAMACER` writer - Ram Access Interrupt Enable"]
68pub type RAMACER_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
69#[doc = "Field `LPMNYET` reader - Link Power Management Not Yet Interrupt Enable"]
70pub type LPMNYET_R = crate::BitReader<bool>;
71#[doc = "Field `LPMNYET` writer - Link Power Management Not Yet Interrupt Enable"]
72pub type LPMNYET_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
73#[doc = "Field `LPMSUSP` reader - Link Power Management Suspend Interrupt Enable"]
74pub type LPMSUSP_R = crate::BitReader<bool>;
75#[doc = "Field `LPMSUSP` writer - Link Power Management Suspend Interrupt Enable"]
76pub type LPMSUSP_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENSET_SPEC, bool, O>;
77impl R {
78 #[doc = "Bit 0 - Suspend Interrupt Enable"]
79 #[inline(always)]
80 pub fn suspend(&self) -> SUSPEND_R {
81 SUSPEND_R::new((self.bits & 1) != 0)
82 }
83 #[doc = "Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode"]
84 #[inline(always)]
85 pub fn msof(&self) -> MSOF_R {
86 MSOF_R::new(((self.bits >> 1) & 1) != 0)
87 }
88 #[doc = "Bit 2 - Start Of Frame Interrupt Enable"]
89 #[inline(always)]
90 pub fn sof(&self) -> SOF_R {
91 SOF_R::new(((self.bits >> 2) & 1) != 0)
92 }
93 #[doc = "Bit 3 - End of Reset Interrupt Enable"]
94 #[inline(always)]
95 pub fn eorst(&self) -> EORST_R {
96 EORST_R::new(((self.bits >> 3) & 1) != 0)
97 }
98 #[doc = "Bit 4 - Wake Up Interrupt Enable"]
99 #[inline(always)]
100 pub fn wakeup(&self) -> WAKEUP_R {
101 WAKEUP_R::new(((self.bits >> 4) & 1) != 0)
102 }
103 #[doc = "Bit 5 - End Of Resume Interrupt Enable"]
104 #[inline(always)]
105 pub fn eorsm(&self) -> EORSM_R {
106 EORSM_R::new(((self.bits >> 5) & 1) != 0)
107 }
108 #[doc = "Bit 6 - Upstream Resume Interrupt Enable"]
109 #[inline(always)]
110 pub fn uprsm(&self) -> UPRSM_R {
111 UPRSM_R::new(((self.bits >> 6) & 1) != 0)
112 }
113 #[doc = "Bit 7 - Ram Access Interrupt Enable"]
114 #[inline(always)]
115 pub fn ramacer(&self) -> RAMACER_R {
116 RAMACER_R::new(((self.bits >> 7) & 1) != 0)
117 }
118 #[doc = "Bit 8 - Link Power Management Not Yet Interrupt Enable"]
119 #[inline(always)]
120 pub fn lpmnyet(&self) -> LPMNYET_R {
121 LPMNYET_R::new(((self.bits >> 8) & 1) != 0)
122 }
123 #[doc = "Bit 9 - Link Power Management Suspend Interrupt Enable"]
124 #[inline(always)]
125 pub fn lpmsusp(&self) -> LPMSUSP_R {
126 LPMSUSP_R::new(((self.bits >> 9) & 1) != 0)
127 }
128}
129impl W {
130 #[doc = "Bit 0 - Suspend Interrupt Enable"]
131 #[inline(always)]
132 #[must_use]
133 pub fn suspend(&mut self) -> SUSPEND_W<0> {
134 SUSPEND_W::new(self)
135 }
136 #[doc = "Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode"]
137 #[inline(always)]
138 #[must_use]
139 pub fn msof(&mut self) -> MSOF_W<1> {
140 MSOF_W::new(self)
141 }
142 #[doc = "Bit 2 - Start Of Frame Interrupt Enable"]
143 #[inline(always)]
144 #[must_use]
145 pub fn sof(&mut self) -> SOF_W<2> {
146 SOF_W::new(self)
147 }
148 #[doc = "Bit 3 - End of Reset Interrupt Enable"]
149 #[inline(always)]
150 #[must_use]
151 pub fn eorst(&mut self) -> EORST_W<3> {
152 EORST_W::new(self)
153 }
154 #[doc = "Bit 4 - Wake Up Interrupt Enable"]
155 #[inline(always)]
156 #[must_use]
157 pub fn wakeup(&mut self) -> WAKEUP_W<4> {
158 WAKEUP_W::new(self)
159 }
160 #[doc = "Bit 5 - End Of Resume Interrupt Enable"]
161 #[inline(always)]
162 #[must_use]
163 pub fn eorsm(&mut self) -> EORSM_W<5> {
164 EORSM_W::new(self)
165 }
166 #[doc = "Bit 6 - Upstream Resume Interrupt Enable"]
167 #[inline(always)]
168 #[must_use]
169 pub fn uprsm(&mut self) -> UPRSM_W<6> {
170 UPRSM_W::new(self)
171 }
172 #[doc = "Bit 7 - Ram Access Interrupt Enable"]
173 #[inline(always)]
174 #[must_use]
175 pub fn ramacer(&mut self) -> RAMACER_W<7> {
176 RAMACER_W::new(self)
177 }
178 #[doc = "Bit 8 - Link Power Management Not Yet Interrupt Enable"]
179 #[inline(always)]
180 #[must_use]
181 pub fn lpmnyet(&mut self) -> LPMNYET_W<8> {
182 LPMNYET_W::new(self)
183 }
184 #[doc = "Bit 9 - Link Power Management Suspend Interrupt Enable"]
185 #[inline(always)]
186 #[must_use]
187 pub fn lpmsusp(&mut self) -> LPMSUSP_W<9> {
188 LPMSUSP_W::new(self)
189 }
190 #[doc = "Writes raw bits to the register."]
191 #[inline(always)]
192 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
193 self.0.bits(bits);
194 self
195 }
196}
197#[doc = "DEVICE Device Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
198pub struct INTENSET_SPEC;
199impl crate::RegisterSpec for INTENSET_SPEC {
200 type Ux = u16;
201}
202#[doc = "`read()` method returns [intenset::R](R) reader structure"]
203impl crate::Readable for INTENSET_SPEC {
204 type Reader = R;
205}
206#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
207impl crate::Writable for INTENSET_SPEC {
208 type Writer = W;
209 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
210 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211}
212#[doc = "`reset()` method sets INTENSET to value 0"]
213impl crate::Resettable for INTENSET_SPEC {
214 const RESET_VALUE: Self::Ux = 0;
215}