atsaml21e17b/oscctrl/
status.rs1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<STATUS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `XOSCRDY` reader - XOSC Ready"]
17pub type XOSCRDY_R = crate::BitReader<bool>;
18#[doc = "Field `OSC16MRDY` reader - OSC16M Ready"]
19pub type OSC16MRDY_R = crate::BitReader<bool>;
20#[doc = "Field `DFLLRDY` reader - DFLL Ready"]
21pub type DFLLRDY_R = crate::BitReader<bool>;
22#[doc = "Field `DFLLOOB` reader - DFLL Out Of Bounds"]
23pub type DFLLOOB_R = crate::BitReader<bool>;
24#[doc = "Field `DFLLLCKF` reader - DFLL Lock Fine"]
25pub type DFLLLCKF_R = crate::BitReader<bool>;
26#[doc = "Field `DFLLLCKC` reader - DFLL Lock Coarse"]
27pub type DFLLLCKC_R = crate::BitReader<bool>;
28#[doc = "Field `DFLLRCS` reader - DFLL Reference Clock Stopped"]
29pub type DFLLRCS_R = crate::BitReader<bool>;
30#[doc = "Field `DPLLLCKR` reader - DPLL Lock Rise"]
31pub type DPLLLCKR_R = crate::BitReader<bool>;
32#[doc = "Field `DPLLLCKF` reader - DPLL Lock Fall"]
33pub type DPLLLCKF_R = crate::BitReader<bool>;
34#[doc = "Field `DPLLTO` reader - DPLL Timeout"]
35pub type DPLLTO_R = crate::BitReader<bool>;
36#[doc = "Field `DPLLLDRTO` reader - DPLL Ratio Ready"]
37pub type DPLLLDRTO_R = crate::BitReader<bool>;
38impl R {
39 #[doc = "Bit 0 - XOSC Ready"]
40 #[inline(always)]
41 pub fn xoscrdy(&self) -> XOSCRDY_R {
42 XOSCRDY_R::new((self.bits & 1) != 0)
43 }
44 #[doc = "Bit 4 - OSC16M Ready"]
45 #[inline(always)]
46 pub fn osc16mrdy(&self) -> OSC16MRDY_R {
47 OSC16MRDY_R::new(((self.bits >> 4) & 1) != 0)
48 }
49 #[doc = "Bit 8 - DFLL Ready"]
50 #[inline(always)]
51 pub fn dfllrdy(&self) -> DFLLRDY_R {
52 DFLLRDY_R::new(((self.bits >> 8) & 1) != 0)
53 }
54 #[doc = "Bit 9 - DFLL Out Of Bounds"]
55 #[inline(always)]
56 pub fn dflloob(&self) -> DFLLOOB_R {
57 DFLLOOB_R::new(((self.bits >> 9) & 1) != 0)
58 }
59 #[doc = "Bit 10 - DFLL Lock Fine"]
60 #[inline(always)]
61 pub fn dflllckf(&self) -> DFLLLCKF_R {
62 DFLLLCKF_R::new(((self.bits >> 10) & 1) != 0)
63 }
64 #[doc = "Bit 11 - DFLL Lock Coarse"]
65 #[inline(always)]
66 pub fn dflllckc(&self) -> DFLLLCKC_R {
67 DFLLLCKC_R::new(((self.bits >> 11) & 1) != 0)
68 }
69 #[doc = "Bit 12 - DFLL Reference Clock Stopped"]
70 #[inline(always)]
71 pub fn dfllrcs(&self) -> DFLLRCS_R {
72 DFLLRCS_R::new(((self.bits >> 12) & 1) != 0)
73 }
74 #[doc = "Bit 16 - DPLL Lock Rise"]
75 #[inline(always)]
76 pub fn dplllckr(&self) -> DPLLLCKR_R {
77 DPLLLCKR_R::new(((self.bits >> 16) & 1) != 0)
78 }
79 #[doc = "Bit 17 - DPLL Lock Fall"]
80 #[inline(always)]
81 pub fn dplllckf(&self) -> DPLLLCKF_R {
82 DPLLLCKF_R::new(((self.bits >> 17) & 1) != 0)
83 }
84 #[doc = "Bit 18 - DPLL Timeout"]
85 #[inline(always)]
86 pub fn dpllto(&self) -> DPLLTO_R {
87 DPLLTO_R::new(((self.bits >> 18) & 1) != 0)
88 }
89 #[doc = "Bit 19 - DPLL Ratio Ready"]
90 #[inline(always)]
91 pub fn dpllldrto(&self) -> DPLLLDRTO_R {
92 DPLLLDRTO_R::new(((self.bits >> 19) & 1) != 0)
93 }
94}
95#[doc = "Power and Clocks Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
96pub struct STATUS_SPEC;
97impl crate::RegisterSpec for STATUS_SPEC {
98 type Ux = u32;
99}
100#[doc = "`read()` method returns [status::R](R) reader structure"]
101impl crate::Readable for STATUS_SPEC {
102 type Reader = R;
103}
104#[doc = "`reset()` method sets STATUS to value 0"]
105impl crate::Resettable for STATUS_SPEC {
106 const RESET_VALUE: Self::Ux = 0;
107}