atsaml21e17b/ac/
compctrl.rs

1#[doc = "Register `COMPCTRL%s` reader"]
2pub struct R(crate::R<COMPCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<COMPCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<COMPCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<COMPCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `COMPCTRL%s` writer"]
17pub struct W(crate::W<COMPCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<COMPCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<COMPCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<COMPCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ENABLE` reader - Enable"]
38pub type ENABLE_R = crate::BitReader<bool>;
39#[doc = "Field `ENABLE` writer - Enable"]
40pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, COMPCTRL_SPEC, bool, O>;
41#[doc = "Field `SINGLE` reader - Single-Shot Mode"]
42pub type SINGLE_R = crate::BitReader<bool>;
43#[doc = "Field `SINGLE` writer - Single-Shot Mode"]
44pub type SINGLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, COMPCTRL_SPEC, bool, O>;
45#[doc = "Field `INTSEL` reader - Interrupt Selection"]
46pub type INTSEL_R = crate::FieldReader<u8, INTSELSELECT_A>;
47#[doc = "Interrupt Selection\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum INTSELSELECT_A {
51    #[doc = "0: Interrupt on comparator output toggle"]
52    TOGGLE = 0,
53    #[doc = "1: Interrupt on comparator output rising"]
54    RISING = 1,
55    #[doc = "2: Interrupt on comparator output falling"]
56    FALLING = 2,
57    #[doc = "3: Interrupt on end of comparison (single-shot mode only)"]
58    EOC = 3,
59}
60impl From<INTSELSELECT_A> for u8 {
61    #[inline(always)]
62    fn from(variant: INTSELSELECT_A) -> Self {
63        variant as _
64    }
65}
66impl INTSEL_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> INTSELSELECT_A {
70        match self.bits {
71            0 => INTSELSELECT_A::TOGGLE,
72            1 => INTSELSELECT_A::RISING,
73            2 => INTSELSELECT_A::FALLING,
74            3 => INTSELSELECT_A::EOC,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "Checks if the value of the field is `TOGGLE`"]
79    #[inline(always)]
80    pub fn is_toggle(&self) -> bool {
81        *self == INTSELSELECT_A::TOGGLE
82    }
83    #[doc = "Checks if the value of the field is `RISING`"]
84    #[inline(always)]
85    pub fn is_rising(&self) -> bool {
86        *self == INTSELSELECT_A::RISING
87    }
88    #[doc = "Checks if the value of the field is `FALLING`"]
89    #[inline(always)]
90    pub fn is_falling(&self) -> bool {
91        *self == INTSELSELECT_A::FALLING
92    }
93    #[doc = "Checks if the value of the field is `EOC`"]
94    #[inline(always)]
95    pub fn is_eoc(&self) -> bool {
96        *self == INTSELSELECT_A::EOC
97    }
98}
99#[doc = "Field `INTSEL` writer - Interrupt Selection"]
100pub type INTSEL_W<'a, const O: u8> =
101    crate::FieldWriterSafe<'a, u32, COMPCTRL_SPEC, u8, INTSELSELECT_A, 2, O>;
102impl<'a, const O: u8> INTSEL_W<'a, O> {
103    #[doc = "Interrupt on comparator output toggle"]
104    #[inline(always)]
105    pub fn toggle(self) -> &'a mut W {
106        self.variant(INTSELSELECT_A::TOGGLE)
107    }
108    #[doc = "Interrupt on comparator output rising"]
109    #[inline(always)]
110    pub fn rising(self) -> &'a mut W {
111        self.variant(INTSELSELECT_A::RISING)
112    }
113    #[doc = "Interrupt on comparator output falling"]
114    #[inline(always)]
115    pub fn falling(self) -> &'a mut W {
116        self.variant(INTSELSELECT_A::FALLING)
117    }
118    #[doc = "Interrupt on end of comparison (single-shot mode only)"]
119    #[inline(always)]
120    pub fn eoc(self) -> &'a mut W {
121        self.variant(INTSELSELECT_A::EOC)
122    }
123}
124#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
125pub type RUNSTDBY_R = crate::BitReader<bool>;
126#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
127pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, COMPCTRL_SPEC, bool, O>;
128#[doc = "Field `MUXNEG` reader - Negative Input Mux Selection"]
129pub type MUXNEG_R = crate::FieldReader<u8, MUXNEGSELECT_A>;
130#[doc = "Negative Input Mux Selection\n\nValue on reset: 0"]
131#[derive(Clone, Copy, Debug, PartialEq, Eq)]
132#[repr(u8)]
133pub enum MUXNEGSELECT_A {
134    #[doc = "0: I/O pin 0"]
135    PIN0 = 0,
136    #[doc = "1: I/O pin 1"]
137    PIN1 = 1,
138    #[doc = "2: I/O pin 2"]
139    PIN2 = 2,
140    #[doc = "3: I/O pin 3"]
141    PIN3 = 3,
142    #[doc = "4: Ground"]
143    GND = 4,
144    #[doc = "5: VDD scaler"]
145    VSCALE = 5,
146    #[doc = "6: Internal bandgap voltage"]
147    BANDGAP = 6,
148    #[doc = "7: DAC output"]
149    DAC = 7,
150}
151impl From<MUXNEGSELECT_A> for u8 {
152    #[inline(always)]
153    fn from(variant: MUXNEGSELECT_A) -> Self {
154        variant as _
155    }
156}
157impl MUXNEG_R {
158    #[doc = "Get enumerated values variant"]
159    #[inline(always)]
160    pub fn variant(&self) -> MUXNEGSELECT_A {
161        match self.bits {
162            0 => MUXNEGSELECT_A::PIN0,
163            1 => MUXNEGSELECT_A::PIN1,
164            2 => MUXNEGSELECT_A::PIN2,
165            3 => MUXNEGSELECT_A::PIN3,
166            4 => MUXNEGSELECT_A::GND,
167            5 => MUXNEGSELECT_A::VSCALE,
168            6 => MUXNEGSELECT_A::BANDGAP,
169            7 => MUXNEGSELECT_A::DAC,
170            _ => unreachable!(),
171        }
172    }
173    #[doc = "Checks if the value of the field is `PIN0`"]
174    #[inline(always)]
175    pub fn is_pin0(&self) -> bool {
176        *self == MUXNEGSELECT_A::PIN0
177    }
178    #[doc = "Checks if the value of the field is `PIN1`"]
179    #[inline(always)]
180    pub fn is_pin1(&self) -> bool {
181        *self == MUXNEGSELECT_A::PIN1
182    }
183    #[doc = "Checks if the value of the field is `PIN2`"]
184    #[inline(always)]
185    pub fn is_pin2(&self) -> bool {
186        *self == MUXNEGSELECT_A::PIN2
187    }
188    #[doc = "Checks if the value of the field is `PIN3`"]
189    #[inline(always)]
190    pub fn is_pin3(&self) -> bool {
191        *self == MUXNEGSELECT_A::PIN3
192    }
193    #[doc = "Checks if the value of the field is `GND`"]
194    #[inline(always)]
195    pub fn is_gnd(&self) -> bool {
196        *self == MUXNEGSELECT_A::GND
197    }
198    #[doc = "Checks if the value of the field is `VSCALE`"]
199    #[inline(always)]
200    pub fn is_vscale(&self) -> bool {
201        *self == MUXNEGSELECT_A::VSCALE
202    }
203    #[doc = "Checks if the value of the field is `BANDGAP`"]
204    #[inline(always)]
205    pub fn is_bandgap(&self) -> bool {
206        *self == MUXNEGSELECT_A::BANDGAP
207    }
208    #[doc = "Checks if the value of the field is `DAC`"]
209    #[inline(always)]
210    pub fn is_dac(&self) -> bool {
211        *self == MUXNEGSELECT_A::DAC
212    }
213}
214#[doc = "Field `MUXNEG` writer - Negative Input Mux Selection"]
215pub type MUXNEG_W<'a, const O: u8> =
216    crate::FieldWriterSafe<'a, u32, COMPCTRL_SPEC, u8, MUXNEGSELECT_A, 3, O>;
217impl<'a, const O: u8> MUXNEG_W<'a, O> {
218    #[doc = "I/O pin 0"]
219    #[inline(always)]
220    pub fn pin0(self) -> &'a mut W {
221        self.variant(MUXNEGSELECT_A::PIN0)
222    }
223    #[doc = "I/O pin 1"]
224    #[inline(always)]
225    pub fn pin1(self) -> &'a mut W {
226        self.variant(MUXNEGSELECT_A::PIN1)
227    }
228    #[doc = "I/O pin 2"]
229    #[inline(always)]
230    pub fn pin2(self) -> &'a mut W {
231        self.variant(MUXNEGSELECT_A::PIN2)
232    }
233    #[doc = "I/O pin 3"]
234    #[inline(always)]
235    pub fn pin3(self) -> &'a mut W {
236        self.variant(MUXNEGSELECT_A::PIN3)
237    }
238    #[doc = "Ground"]
239    #[inline(always)]
240    pub fn gnd(self) -> &'a mut W {
241        self.variant(MUXNEGSELECT_A::GND)
242    }
243    #[doc = "VDD scaler"]
244    #[inline(always)]
245    pub fn vscale(self) -> &'a mut W {
246        self.variant(MUXNEGSELECT_A::VSCALE)
247    }
248    #[doc = "Internal bandgap voltage"]
249    #[inline(always)]
250    pub fn bandgap(self) -> &'a mut W {
251        self.variant(MUXNEGSELECT_A::BANDGAP)
252    }
253    #[doc = "DAC output"]
254    #[inline(always)]
255    pub fn dac(self) -> &'a mut W {
256        self.variant(MUXNEGSELECT_A::DAC)
257    }
258}
259#[doc = "Field `MUXPOS` reader - Positive Input Mux Selection"]
260pub type MUXPOS_R = crate::FieldReader<u8, MUXPOSSELECT_A>;
261#[doc = "Positive Input Mux Selection\n\nValue on reset: 0"]
262#[derive(Clone, Copy, Debug, PartialEq, Eq)]
263#[repr(u8)]
264pub enum MUXPOSSELECT_A {
265    #[doc = "0: I/O pin 0"]
266    PIN0 = 0,
267    #[doc = "1: I/O pin 1"]
268    PIN1 = 1,
269    #[doc = "2: I/O pin 2"]
270    PIN2 = 2,
271    #[doc = "3: I/O pin 3"]
272    PIN3 = 3,
273    #[doc = "4: VDD Scaler"]
274    VSCALE = 4,
275}
276impl From<MUXPOSSELECT_A> for u8 {
277    #[inline(always)]
278    fn from(variant: MUXPOSSELECT_A) -> Self {
279        variant as _
280    }
281}
282impl MUXPOS_R {
283    #[doc = "Get enumerated values variant"]
284    #[inline(always)]
285    pub fn variant(&self) -> Option<MUXPOSSELECT_A> {
286        match self.bits {
287            0 => Some(MUXPOSSELECT_A::PIN0),
288            1 => Some(MUXPOSSELECT_A::PIN1),
289            2 => Some(MUXPOSSELECT_A::PIN2),
290            3 => Some(MUXPOSSELECT_A::PIN3),
291            4 => Some(MUXPOSSELECT_A::VSCALE),
292            _ => None,
293        }
294    }
295    #[doc = "Checks if the value of the field is `PIN0`"]
296    #[inline(always)]
297    pub fn is_pin0(&self) -> bool {
298        *self == MUXPOSSELECT_A::PIN0
299    }
300    #[doc = "Checks if the value of the field is `PIN1`"]
301    #[inline(always)]
302    pub fn is_pin1(&self) -> bool {
303        *self == MUXPOSSELECT_A::PIN1
304    }
305    #[doc = "Checks if the value of the field is `PIN2`"]
306    #[inline(always)]
307    pub fn is_pin2(&self) -> bool {
308        *self == MUXPOSSELECT_A::PIN2
309    }
310    #[doc = "Checks if the value of the field is `PIN3`"]
311    #[inline(always)]
312    pub fn is_pin3(&self) -> bool {
313        *self == MUXPOSSELECT_A::PIN3
314    }
315    #[doc = "Checks if the value of the field is `VSCALE`"]
316    #[inline(always)]
317    pub fn is_vscale(&self) -> bool {
318        *self == MUXPOSSELECT_A::VSCALE
319    }
320}
321#[doc = "Field `MUXPOS` writer - Positive Input Mux Selection"]
322pub type MUXPOS_W<'a, const O: u8> =
323    crate::FieldWriter<'a, u32, COMPCTRL_SPEC, u8, MUXPOSSELECT_A, 3, O>;
324impl<'a, const O: u8> MUXPOS_W<'a, O> {
325    #[doc = "I/O pin 0"]
326    #[inline(always)]
327    pub fn pin0(self) -> &'a mut W {
328        self.variant(MUXPOSSELECT_A::PIN0)
329    }
330    #[doc = "I/O pin 1"]
331    #[inline(always)]
332    pub fn pin1(self) -> &'a mut W {
333        self.variant(MUXPOSSELECT_A::PIN1)
334    }
335    #[doc = "I/O pin 2"]
336    #[inline(always)]
337    pub fn pin2(self) -> &'a mut W {
338        self.variant(MUXPOSSELECT_A::PIN2)
339    }
340    #[doc = "I/O pin 3"]
341    #[inline(always)]
342    pub fn pin3(self) -> &'a mut W {
343        self.variant(MUXPOSSELECT_A::PIN3)
344    }
345    #[doc = "VDD Scaler"]
346    #[inline(always)]
347    pub fn vscale(self) -> &'a mut W {
348        self.variant(MUXPOSSELECT_A::VSCALE)
349    }
350}
351#[doc = "Field `SWAP` reader - Swap Inputs and Invert"]
352pub type SWAP_R = crate::BitReader<bool>;
353#[doc = "Field `SWAP` writer - Swap Inputs and Invert"]
354pub type SWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, COMPCTRL_SPEC, bool, O>;
355#[doc = "Field `SPEED` reader - Speed Selection"]
356pub type SPEED_R = crate::FieldReader<u8, SPEEDSELECT_A>;
357#[doc = "Speed Selection\n\nValue on reset: 0"]
358#[derive(Clone, Copy, Debug, PartialEq, Eq)]
359#[repr(u8)]
360pub enum SPEEDSELECT_A {
361    #[doc = "0: Low speed"]
362    LOW = 0,
363    #[doc = "1: Medium low speed"]
364    MEDLOW = 1,
365    #[doc = "2: Medium high speed"]
366    MEDHIGH = 2,
367    #[doc = "3: High speed"]
368    HIGH = 3,
369}
370impl From<SPEEDSELECT_A> for u8 {
371    #[inline(always)]
372    fn from(variant: SPEEDSELECT_A) -> Self {
373        variant as _
374    }
375}
376impl SPEED_R {
377    #[doc = "Get enumerated values variant"]
378    #[inline(always)]
379    pub fn variant(&self) -> SPEEDSELECT_A {
380        match self.bits {
381            0 => SPEEDSELECT_A::LOW,
382            1 => SPEEDSELECT_A::MEDLOW,
383            2 => SPEEDSELECT_A::MEDHIGH,
384            3 => SPEEDSELECT_A::HIGH,
385            _ => unreachable!(),
386        }
387    }
388    #[doc = "Checks if the value of the field is `LOW`"]
389    #[inline(always)]
390    pub fn is_low(&self) -> bool {
391        *self == SPEEDSELECT_A::LOW
392    }
393    #[doc = "Checks if the value of the field is `MEDLOW`"]
394    #[inline(always)]
395    pub fn is_medlow(&self) -> bool {
396        *self == SPEEDSELECT_A::MEDLOW
397    }
398    #[doc = "Checks if the value of the field is `MEDHIGH`"]
399    #[inline(always)]
400    pub fn is_medhigh(&self) -> bool {
401        *self == SPEEDSELECT_A::MEDHIGH
402    }
403    #[doc = "Checks if the value of the field is `HIGH`"]
404    #[inline(always)]
405    pub fn is_high(&self) -> bool {
406        *self == SPEEDSELECT_A::HIGH
407    }
408}
409#[doc = "Field `SPEED` writer - Speed Selection"]
410pub type SPEED_W<'a, const O: u8> =
411    crate::FieldWriterSafe<'a, u32, COMPCTRL_SPEC, u8, SPEEDSELECT_A, 2, O>;
412impl<'a, const O: u8> SPEED_W<'a, O> {
413    #[doc = "Low speed"]
414    #[inline(always)]
415    pub fn low(self) -> &'a mut W {
416        self.variant(SPEEDSELECT_A::LOW)
417    }
418    #[doc = "Medium low speed"]
419    #[inline(always)]
420    pub fn medlow(self) -> &'a mut W {
421        self.variant(SPEEDSELECT_A::MEDLOW)
422    }
423    #[doc = "Medium high speed"]
424    #[inline(always)]
425    pub fn medhigh(self) -> &'a mut W {
426        self.variant(SPEEDSELECT_A::MEDHIGH)
427    }
428    #[doc = "High speed"]
429    #[inline(always)]
430    pub fn high(self) -> &'a mut W {
431        self.variant(SPEEDSELECT_A::HIGH)
432    }
433}
434#[doc = "Field `HYSTEN` reader - Hysteresis Enable"]
435pub type HYSTEN_R = crate::BitReader<bool>;
436#[doc = "Field `HYSTEN` writer - Hysteresis Enable"]
437pub type HYSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, COMPCTRL_SPEC, bool, O>;
438#[doc = "Field `HYST` reader - Hysteresis Level"]
439pub type HYST_R = crate::FieldReader<u8, HYSTSELECT_A>;
440#[doc = "Hysteresis Level\n\nValue on reset: 0"]
441#[derive(Clone, Copy, Debug, PartialEq, Eq)]
442#[repr(u8)]
443pub enum HYSTSELECT_A {
444    #[doc = "0: 50mV"]
445    HYST50 = 0,
446    #[doc = "1: 70mV"]
447    HYST70 = 1,
448    #[doc = "2: 90mV"]
449    HYST90 = 2,
450    #[doc = "3: 110mV"]
451    HYST110 = 3,
452}
453impl From<HYSTSELECT_A> for u8 {
454    #[inline(always)]
455    fn from(variant: HYSTSELECT_A) -> Self {
456        variant as _
457    }
458}
459impl HYST_R {
460    #[doc = "Get enumerated values variant"]
461    #[inline(always)]
462    pub fn variant(&self) -> HYSTSELECT_A {
463        match self.bits {
464            0 => HYSTSELECT_A::HYST50,
465            1 => HYSTSELECT_A::HYST70,
466            2 => HYSTSELECT_A::HYST90,
467            3 => HYSTSELECT_A::HYST110,
468            _ => unreachable!(),
469        }
470    }
471    #[doc = "Checks if the value of the field is `HYST50`"]
472    #[inline(always)]
473    pub fn is_hyst50(&self) -> bool {
474        *self == HYSTSELECT_A::HYST50
475    }
476    #[doc = "Checks if the value of the field is `HYST70`"]
477    #[inline(always)]
478    pub fn is_hyst70(&self) -> bool {
479        *self == HYSTSELECT_A::HYST70
480    }
481    #[doc = "Checks if the value of the field is `HYST90`"]
482    #[inline(always)]
483    pub fn is_hyst90(&self) -> bool {
484        *self == HYSTSELECT_A::HYST90
485    }
486    #[doc = "Checks if the value of the field is `HYST110`"]
487    #[inline(always)]
488    pub fn is_hyst110(&self) -> bool {
489        *self == HYSTSELECT_A::HYST110
490    }
491}
492#[doc = "Field `HYST` writer - Hysteresis Level"]
493pub type HYST_W<'a, const O: u8> =
494    crate::FieldWriterSafe<'a, u32, COMPCTRL_SPEC, u8, HYSTSELECT_A, 2, O>;
495impl<'a, const O: u8> HYST_W<'a, O> {
496    #[doc = "50mV"]
497    #[inline(always)]
498    pub fn hyst50(self) -> &'a mut W {
499        self.variant(HYSTSELECT_A::HYST50)
500    }
501    #[doc = "70mV"]
502    #[inline(always)]
503    pub fn hyst70(self) -> &'a mut W {
504        self.variant(HYSTSELECT_A::HYST70)
505    }
506    #[doc = "90mV"]
507    #[inline(always)]
508    pub fn hyst90(self) -> &'a mut W {
509        self.variant(HYSTSELECT_A::HYST90)
510    }
511    #[doc = "110mV"]
512    #[inline(always)]
513    pub fn hyst110(self) -> &'a mut W {
514        self.variant(HYSTSELECT_A::HYST110)
515    }
516}
517#[doc = "Field `FLEN` reader - Filter Length"]
518pub type FLEN_R = crate::FieldReader<u8, FLENSELECT_A>;
519#[doc = "Filter Length\n\nValue on reset: 0"]
520#[derive(Clone, Copy, Debug, PartialEq, Eq)]
521#[repr(u8)]
522pub enum FLENSELECT_A {
523    #[doc = "0: No filtering"]
524    OFF = 0,
525    #[doc = "1: 3-bit majority function (2 of 3)"]
526    MAJ3 = 1,
527    #[doc = "2: 5-bit majority function (3 of 5)"]
528    MAJ5 = 2,
529}
530impl From<FLENSELECT_A> for u8 {
531    #[inline(always)]
532    fn from(variant: FLENSELECT_A) -> Self {
533        variant as _
534    }
535}
536impl FLEN_R {
537    #[doc = "Get enumerated values variant"]
538    #[inline(always)]
539    pub fn variant(&self) -> Option<FLENSELECT_A> {
540        match self.bits {
541            0 => Some(FLENSELECT_A::OFF),
542            1 => Some(FLENSELECT_A::MAJ3),
543            2 => Some(FLENSELECT_A::MAJ5),
544            _ => None,
545        }
546    }
547    #[doc = "Checks if the value of the field is `OFF`"]
548    #[inline(always)]
549    pub fn is_off(&self) -> bool {
550        *self == FLENSELECT_A::OFF
551    }
552    #[doc = "Checks if the value of the field is `MAJ3`"]
553    #[inline(always)]
554    pub fn is_maj3(&self) -> bool {
555        *self == FLENSELECT_A::MAJ3
556    }
557    #[doc = "Checks if the value of the field is `MAJ5`"]
558    #[inline(always)]
559    pub fn is_maj5(&self) -> bool {
560        *self == FLENSELECT_A::MAJ5
561    }
562}
563#[doc = "Field `FLEN` writer - Filter Length"]
564pub type FLEN_W<'a, const O: u8> =
565    crate::FieldWriter<'a, u32, COMPCTRL_SPEC, u8, FLENSELECT_A, 3, O>;
566impl<'a, const O: u8> FLEN_W<'a, O> {
567    #[doc = "No filtering"]
568    #[inline(always)]
569    pub fn off(self) -> &'a mut W {
570        self.variant(FLENSELECT_A::OFF)
571    }
572    #[doc = "3-bit majority function (2 of 3)"]
573    #[inline(always)]
574    pub fn maj3(self) -> &'a mut W {
575        self.variant(FLENSELECT_A::MAJ3)
576    }
577    #[doc = "5-bit majority function (3 of 5)"]
578    #[inline(always)]
579    pub fn maj5(self) -> &'a mut W {
580        self.variant(FLENSELECT_A::MAJ5)
581    }
582}
583#[doc = "Field `OUT` reader - Output"]
584pub type OUT_R = crate::FieldReader<u8, OUTSELECT_A>;
585#[doc = "Output\n\nValue on reset: 0"]
586#[derive(Clone, Copy, Debug, PartialEq, Eq)]
587#[repr(u8)]
588pub enum OUTSELECT_A {
589    #[doc = "0: The output of COMPn is not routed to the COMPn I/O port"]
590    OFF = 0,
591    #[doc = "1: The asynchronous output of COMPn is routed to the COMPn I/O port"]
592    ASYNC = 1,
593    #[doc = "2: The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port"]
594    SYNC = 2,
595}
596impl From<OUTSELECT_A> for u8 {
597    #[inline(always)]
598    fn from(variant: OUTSELECT_A) -> Self {
599        variant as _
600    }
601}
602impl OUT_R {
603    #[doc = "Get enumerated values variant"]
604    #[inline(always)]
605    pub fn variant(&self) -> Option<OUTSELECT_A> {
606        match self.bits {
607            0 => Some(OUTSELECT_A::OFF),
608            1 => Some(OUTSELECT_A::ASYNC),
609            2 => Some(OUTSELECT_A::SYNC),
610            _ => None,
611        }
612    }
613    #[doc = "Checks if the value of the field is `OFF`"]
614    #[inline(always)]
615    pub fn is_off(&self) -> bool {
616        *self == OUTSELECT_A::OFF
617    }
618    #[doc = "Checks if the value of the field is `ASYNC`"]
619    #[inline(always)]
620    pub fn is_async(&self) -> bool {
621        *self == OUTSELECT_A::ASYNC
622    }
623    #[doc = "Checks if the value of the field is `SYNC`"]
624    #[inline(always)]
625    pub fn is_sync(&self) -> bool {
626        *self == OUTSELECT_A::SYNC
627    }
628}
629#[doc = "Field `OUT` writer - Output"]
630pub type OUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMPCTRL_SPEC, u8, OUTSELECT_A, 2, O>;
631impl<'a, const O: u8> OUT_W<'a, O> {
632    #[doc = "The output of COMPn is not routed to the COMPn I/O port"]
633    #[inline(always)]
634    pub fn off(self) -> &'a mut W {
635        self.variant(OUTSELECT_A::OFF)
636    }
637    #[doc = "The asynchronous output of COMPn is routed to the COMPn I/O port"]
638    #[inline(always)]
639    pub fn async_(self) -> &'a mut W {
640        self.variant(OUTSELECT_A::ASYNC)
641    }
642    #[doc = "The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port"]
643    #[inline(always)]
644    pub fn sync(self) -> &'a mut W {
645        self.variant(OUTSELECT_A::SYNC)
646    }
647}
648impl R {
649    #[doc = "Bit 1 - Enable"]
650    #[inline(always)]
651    pub fn enable(&self) -> ENABLE_R {
652        ENABLE_R::new(((self.bits >> 1) & 1) != 0)
653    }
654    #[doc = "Bit 2 - Single-Shot Mode"]
655    #[inline(always)]
656    pub fn single(&self) -> SINGLE_R {
657        SINGLE_R::new(((self.bits >> 2) & 1) != 0)
658    }
659    #[doc = "Bits 3:4 - Interrupt Selection"]
660    #[inline(always)]
661    pub fn intsel(&self) -> INTSEL_R {
662        INTSEL_R::new(((self.bits >> 3) & 3) as u8)
663    }
664    #[doc = "Bit 6 - Run in Standby"]
665    #[inline(always)]
666    pub fn runstdby(&self) -> RUNSTDBY_R {
667        RUNSTDBY_R::new(((self.bits >> 6) & 1) != 0)
668    }
669    #[doc = "Bits 8:10 - Negative Input Mux Selection"]
670    #[inline(always)]
671    pub fn muxneg(&self) -> MUXNEG_R {
672        MUXNEG_R::new(((self.bits >> 8) & 7) as u8)
673    }
674    #[doc = "Bits 12:14 - Positive Input Mux Selection"]
675    #[inline(always)]
676    pub fn muxpos(&self) -> MUXPOS_R {
677        MUXPOS_R::new(((self.bits >> 12) & 7) as u8)
678    }
679    #[doc = "Bit 15 - Swap Inputs and Invert"]
680    #[inline(always)]
681    pub fn swap(&self) -> SWAP_R {
682        SWAP_R::new(((self.bits >> 15) & 1) != 0)
683    }
684    #[doc = "Bits 16:17 - Speed Selection"]
685    #[inline(always)]
686    pub fn speed(&self) -> SPEED_R {
687        SPEED_R::new(((self.bits >> 16) & 3) as u8)
688    }
689    #[doc = "Bit 19 - Hysteresis Enable"]
690    #[inline(always)]
691    pub fn hysten(&self) -> HYSTEN_R {
692        HYSTEN_R::new(((self.bits >> 19) & 1) != 0)
693    }
694    #[doc = "Bits 20:21 - Hysteresis Level"]
695    #[inline(always)]
696    pub fn hyst(&self) -> HYST_R {
697        HYST_R::new(((self.bits >> 20) & 3) as u8)
698    }
699    #[doc = "Bits 24:26 - Filter Length"]
700    #[inline(always)]
701    pub fn flen(&self) -> FLEN_R {
702        FLEN_R::new(((self.bits >> 24) & 7) as u8)
703    }
704    #[doc = "Bits 28:29 - Output"]
705    #[inline(always)]
706    pub fn out(&self) -> OUT_R {
707        OUT_R::new(((self.bits >> 28) & 3) as u8)
708    }
709}
710impl W {
711    #[doc = "Bit 1 - Enable"]
712    #[inline(always)]
713    #[must_use]
714    pub fn enable(&mut self) -> ENABLE_W<1> {
715        ENABLE_W::new(self)
716    }
717    #[doc = "Bit 2 - Single-Shot Mode"]
718    #[inline(always)]
719    #[must_use]
720    pub fn single(&mut self) -> SINGLE_W<2> {
721        SINGLE_W::new(self)
722    }
723    #[doc = "Bits 3:4 - Interrupt Selection"]
724    #[inline(always)]
725    #[must_use]
726    pub fn intsel(&mut self) -> INTSEL_W<3> {
727        INTSEL_W::new(self)
728    }
729    #[doc = "Bit 6 - Run in Standby"]
730    #[inline(always)]
731    #[must_use]
732    pub fn runstdby(&mut self) -> RUNSTDBY_W<6> {
733        RUNSTDBY_W::new(self)
734    }
735    #[doc = "Bits 8:10 - Negative Input Mux Selection"]
736    #[inline(always)]
737    #[must_use]
738    pub fn muxneg(&mut self) -> MUXNEG_W<8> {
739        MUXNEG_W::new(self)
740    }
741    #[doc = "Bits 12:14 - Positive Input Mux Selection"]
742    #[inline(always)]
743    #[must_use]
744    pub fn muxpos(&mut self) -> MUXPOS_W<12> {
745        MUXPOS_W::new(self)
746    }
747    #[doc = "Bit 15 - Swap Inputs and Invert"]
748    #[inline(always)]
749    #[must_use]
750    pub fn swap(&mut self) -> SWAP_W<15> {
751        SWAP_W::new(self)
752    }
753    #[doc = "Bits 16:17 - Speed Selection"]
754    #[inline(always)]
755    #[must_use]
756    pub fn speed(&mut self) -> SPEED_W<16> {
757        SPEED_W::new(self)
758    }
759    #[doc = "Bit 19 - Hysteresis Enable"]
760    #[inline(always)]
761    #[must_use]
762    pub fn hysten(&mut self) -> HYSTEN_W<19> {
763        HYSTEN_W::new(self)
764    }
765    #[doc = "Bits 20:21 - Hysteresis Level"]
766    #[inline(always)]
767    #[must_use]
768    pub fn hyst(&mut self) -> HYST_W<20> {
769        HYST_W::new(self)
770    }
771    #[doc = "Bits 24:26 - Filter Length"]
772    #[inline(always)]
773    #[must_use]
774    pub fn flen(&mut self) -> FLEN_W<24> {
775        FLEN_W::new(self)
776    }
777    #[doc = "Bits 28:29 - Output"]
778    #[inline(always)]
779    #[must_use]
780    pub fn out(&mut self) -> OUT_W<28> {
781        OUT_W::new(self)
782    }
783    #[doc = "Writes raw bits to the register."]
784    #[inline(always)]
785    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
786        self.0.bits(bits);
787        self
788    }
789}
790#[doc = "Comparator Control n\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [compctrl](index.html) module"]
791pub struct COMPCTRL_SPEC;
792impl crate::RegisterSpec for COMPCTRL_SPEC {
793    type Ux = u32;
794}
795#[doc = "`read()` method returns [compctrl::R](R) reader structure"]
796impl crate::Readable for COMPCTRL_SPEC {
797    type Reader = R;
798}
799#[doc = "`write(|w| ..)` method takes [compctrl::W](W) writer structure"]
800impl crate::Writable for COMPCTRL_SPEC {
801    type Writer = W;
802    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
803    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
804}
805#[doc = "`reset()` method sets COMPCTRL%s to value 0"]
806impl crate::Resettable for COMPCTRL_SPEC {
807    const RESET_VALUE: Self::Ux = 0;
808}
atsaml21e17b/ac/compctrl.rs

atsaml21e17b/ac/
compctrl.rs
