atsaml21e15b/mclk/
lpdiv.rs

1#[doc = "Register `LPDIV` reader"]
2pub struct R(crate::R<LPDIV_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LPDIV_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LPDIV_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LPDIV_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LPDIV` writer"]
17pub struct W(crate::W<LPDIV_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LPDIV_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LPDIV_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LPDIV_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `LPDIV` reader - Low-Power Clock Division Factor"]
38pub type LPDIV_R = crate::FieldReader<u8, LPDIVSELECT_A>;
39#[doc = "Low-Power Clock Division Factor\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum LPDIVSELECT_A {
43    #[doc = "1: Divide by 1"]
44    DIV1 = 1,
45    #[doc = "2: Divide by 2"]
46    DIV2 = 2,
47    #[doc = "4: Divide by 4"]
48    DIV4 = 4,
49    #[doc = "8: Divide by 8"]
50    DIV8 = 8,
51    #[doc = "16: Divide by 16"]
52    DIV16 = 16,
53    #[doc = "32: Divide by 32"]
54    DIV32 = 32,
55    #[doc = "64: Divide by 64"]
56    DIV64 = 64,
57    #[doc = "128: Divide by 128"]
58    DIV128 = 128,
59}
60impl From<LPDIVSELECT_A> for u8 {
61    #[inline(always)]
62    fn from(variant: LPDIVSELECT_A) -> Self {
63        variant as _
64    }
65}
66impl LPDIV_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> Option<LPDIVSELECT_A> {
70        match self.bits {
71            1 => Some(LPDIVSELECT_A::DIV1),
72            2 => Some(LPDIVSELECT_A::DIV2),
73            4 => Some(LPDIVSELECT_A::DIV4),
74            8 => Some(LPDIVSELECT_A::DIV8),
75            16 => Some(LPDIVSELECT_A::DIV16),
76            32 => Some(LPDIVSELECT_A::DIV32),
77            64 => Some(LPDIVSELECT_A::DIV64),
78            128 => Some(LPDIVSELECT_A::DIV128),
79            _ => None,
80        }
81    }
82    #[doc = "Checks if the value of the field is `DIV1`"]
83    #[inline(always)]
84    pub fn is_div1(&self) -> bool {
85        *self == LPDIVSELECT_A::DIV1
86    }
87    #[doc = "Checks if the value of the field is `DIV2`"]
88    #[inline(always)]
89    pub fn is_div2(&self) -> bool {
90        *self == LPDIVSELECT_A::DIV2
91    }
92    #[doc = "Checks if the value of the field is `DIV4`"]
93    #[inline(always)]
94    pub fn is_div4(&self) -> bool {
95        *self == LPDIVSELECT_A::DIV4
96    }
97    #[doc = "Checks if the value of the field is `DIV8`"]
98    #[inline(always)]
99    pub fn is_div8(&self) -> bool {
100        *self == LPDIVSELECT_A::DIV8
101    }
102    #[doc = "Checks if the value of the field is `DIV16`"]
103    #[inline(always)]
104    pub fn is_div16(&self) -> bool {
105        *self == LPDIVSELECT_A::DIV16
106    }
107    #[doc = "Checks if the value of the field is `DIV32`"]
108    #[inline(always)]
109    pub fn is_div32(&self) -> bool {
110        *self == LPDIVSELECT_A::DIV32
111    }
112    #[doc = "Checks if the value of the field is `DIV64`"]
113    #[inline(always)]
114    pub fn is_div64(&self) -> bool {
115        *self == LPDIVSELECT_A::DIV64
116    }
117    #[doc = "Checks if the value of the field is `DIV128`"]
118    #[inline(always)]
119    pub fn is_div128(&self) -> bool {
120        *self == LPDIVSELECT_A::DIV128
121    }
122}
123#[doc = "Field `LPDIV` writer - Low-Power Clock Division Factor"]
124pub type LPDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u8, LPDIV_SPEC, u8, LPDIVSELECT_A, 8, O>;
125impl<'a, const O: u8> LPDIV_W<'a, O> {
126    #[doc = "Divide by 1"]
127    #[inline(always)]
128    pub fn div1(self) -> &'a mut W {
129        self.variant(LPDIVSELECT_A::DIV1)
130    }
131    #[doc = "Divide by 2"]
132    #[inline(always)]
133    pub fn div2(self) -> &'a mut W {
134        self.variant(LPDIVSELECT_A::DIV2)
135    }
136    #[doc = "Divide by 4"]
137    #[inline(always)]
138    pub fn div4(self) -> &'a mut W {
139        self.variant(LPDIVSELECT_A::DIV4)
140    }
141    #[doc = "Divide by 8"]
142    #[inline(always)]
143    pub fn div8(self) -> &'a mut W {
144        self.variant(LPDIVSELECT_A::DIV8)
145    }
146    #[doc = "Divide by 16"]
147    #[inline(always)]
148    pub fn div16(self) -> &'a mut W {
149        self.variant(LPDIVSELECT_A::DIV16)
150    }
151    #[doc = "Divide by 32"]
152    #[inline(always)]
153    pub fn div32(self) -> &'a mut W {
154        self.variant(LPDIVSELECT_A::DIV32)
155    }
156    #[doc = "Divide by 64"]
157    #[inline(always)]
158    pub fn div64(self) -> &'a mut W {
159        self.variant(LPDIVSELECT_A::DIV64)
160    }
161    #[doc = "Divide by 128"]
162    #[inline(always)]
163    pub fn div128(self) -> &'a mut W {
164        self.variant(LPDIVSELECT_A::DIV128)
165    }
166}
167impl R {
168    #[doc = "Bits 0:7 - Low-Power Clock Division Factor"]
169    #[inline(always)]
170    pub fn lpdiv(&self) -> LPDIV_R {
171        LPDIV_R::new(self.bits)
172    }
173}
174impl W {
175    #[doc = "Bits 0:7 - Low-Power Clock Division Factor"]
176    #[inline(always)]
177    #[must_use]
178    pub fn lpdiv(&mut self) -> LPDIV_W<0> {
179        LPDIV_W::new(self)
180    }
181    #[doc = "Writes raw bits to the register."]
182    #[inline(always)]
183    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
184        self.0.bits(bits);
185        self
186    }
187}
188#[doc = "Low-Power Clock Division\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lpdiv](index.html) module"]
189pub struct LPDIV_SPEC;
190impl crate::RegisterSpec for LPDIV_SPEC {
191    type Ux = u8;
192}
193#[doc = "`read()` method returns [lpdiv::R](R) reader structure"]
194impl crate::Readable for LPDIV_SPEC {
195    type Reader = R;
196}
197#[doc = "`write(|w| ..)` method takes [lpdiv::W](W) writer structure"]
198impl crate::Writable for LPDIV_SPEC {
199    type Writer = W;
200    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
201    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
202}
203#[doc = "`reset()` method sets LPDIV to value 0x01"]
204impl crate::Resettable for LPDIV_SPEC {
205    const RESET_VALUE: Self::Ux = 0x01;
206}
atsaml21e15b/mclk/lpdiv.rs

atsaml21e15b/mclk/
lpdiv.rs
