atsaml21e15b/osc32kctrl/
osc32k.rs

1#[doc = "Register `OSC32K` reader"]
2pub struct R(crate::R<OSC32K_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<OSC32K_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<OSC32K_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<OSC32K_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `OSC32K` writer"]
17pub struct W(crate::W<OSC32K_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<OSC32K_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<OSC32K_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<OSC32K_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ENABLE` reader - Oscillator Enable"]
38pub type ENABLE_R = crate::BitReader<bool>;
39#[doc = "Field `ENABLE` writer - Oscillator Enable"]
40pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSC32K_SPEC, bool, O>;
41#[doc = "Field `EN32K` reader - 32kHz Output Enable"]
42pub type EN32K_R = crate::BitReader<bool>;
43#[doc = "Field `EN32K` writer - 32kHz Output Enable"]
44pub type EN32K_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSC32K_SPEC, bool, O>;
45#[doc = "Field `EN1K` reader - 1kHz Output Enable"]
46pub type EN1K_R = crate::BitReader<bool>;
47#[doc = "Field `EN1K` writer - 1kHz Output Enable"]
48pub type EN1K_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSC32K_SPEC, bool, O>;
49#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
50pub type RUNSTDBY_R = crate::BitReader<bool>;
51#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
52pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSC32K_SPEC, bool, O>;
53#[doc = "Field `ONDEMAND` reader - On Demand Control"]
54pub type ONDEMAND_R = crate::BitReader<bool>;
55#[doc = "Field `ONDEMAND` writer - On Demand Control"]
56pub type ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSC32K_SPEC, bool, O>;
57#[doc = "Field `STARTUP` reader - Oscillator Start-Up Time"]
58pub type STARTUP_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `STARTUP` writer - Oscillator Start-Up Time"]
60pub type STARTUP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OSC32K_SPEC, u8, u8, 3, O>;
61#[doc = "Field `WRTLOCK` reader - Write Lock"]
62pub type WRTLOCK_R = crate::BitReader<bool>;
63#[doc = "Field `WRTLOCK` writer - Write Lock"]
64pub type WRTLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, OSC32K_SPEC, bool, O>;
65#[doc = "Field `CALIB` reader - Oscillator Calibration"]
66pub type CALIB_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `CALIB` writer - Oscillator Calibration"]
68pub type CALIB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OSC32K_SPEC, u8, u8, 7, O>;
69impl R {
70    #[doc = "Bit 1 - Oscillator Enable"]
71    #[inline(always)]
72    pub fn enable(&self) -> ENABLE_R {
73        ENABLE_R::new(((self.bits >> 1) & 1) != 0)
74    }
75    #[doc = "Bit 2 - 32kHz Output Enable"]
76    #[inline(always)]
77    pub fn en32k(&self) -> EN32K_R {
78        EN32K_R::new(((self.bits >> 2) & 1) != 0)
79    }
80    #[doc = "Bit 3 - 1kHz Output Enable"]
81    #[inline(always)]
82    pub fn en1k(&self) -> EN1K_R {
83        EN1K_R::new(((self.bits >> 3) & 1) != 0)
84    }
85    #[doc = "Bit 6 - Run in Standby"]
86    #[inline(always)]
87    pub fn runstdby(&self) -> RUNSTDBY_R {
88        RUNSTDBY_R::new(((self.bits >> 6) & 1) != 0)
89    }
90    #[doc = "Bit 7 - On Demand Control"]
91    #[inline(always)]
92    pub fn ondemand(&self) -> ONDEMAND_R {
93        ONDEMAND_R::new(((self.bits >> 7) & 1) != 0)
94    }
95    #[doc = "Bits 8:10 - Oscillator Start-Up Time"]
96    #[inline(always)]
97    pub fn startup(&self) -> STARTUP_R {
98        STARTUP_R::new(((self.bits >> 8) & 7) as u8)
99    }
100    #[doc = "Bit 12 - Write Lock"]
101    #[inline(always)]
102    pub fn wrtlock(&self) -> WRTLOCK_R {
103        WRTLOCK_R::new(((self.bits >> 12) & 1) != 0)
104    }
105    #[doc = "Bits 16:22 - Oscillator Calibration"]
106    #[inline(always)]
107    pub fn calib(&self) -> CALIB_R {
108        CALIB_R::new(((self.bits >> 16) & 0x7f) as u8)
109    }
110}
111impl W {
112    #[doc = "Bit 1 - Oscillator Enable"]
113    #[inline(always)]
114    #[must_use]
115    pub fn enable(&mut self) -> ENABLE_W<1> {
116        ENABLE_W::new(self)
117    }
118    #[doc = "Bit 2 - 32kHz Output Enable"]
119    #[inline(always)]
120    #[must_use]
121    pub fn en32k(&mut self) -> EN32K_W<2> {
122        EN32K_W::new(self)
123    }
124    #[doc = "Bit 3 - 1kHz Output Enable"]
125    #[inline(always)]
126    #[must_use]
127    pub fn en1k(&mut self) -> EN1K_W<3> {
128        EN1K_W::new(self)
129    }
130    #[doc = "Bit 6 - Run in Standby"]
131    #[inline(always)]
132    #[must_use]
133    pub fn runstdby(&mut self) -> RUNSTDBY_W<6> {
134        RUNSTDBY_W::new(self)
135    }
136    #[doc = "Bit 7 - On Demand Control"]
137    #[inline(always)]
138    #[must_use]
139    pub fn ondemand(&mut self) -> ONDEMAND_W<7> {
140        ONDEMAND_W::new(self)
141    }
142    #[doc = "Bits 8:10 - Oscillator Start-Up Time"]
143    #[inline(always)]
144    #[must_use]
145    pub fn startup(&mut self) -> STARTUP_W<8> {
146        STARTUP_W::new(self)
147    }
148    #[doc = "Bit 12 - Write Lock"]
149    #[inline(always)]
150    #[must_use]
151    pub fn wrtlock(&mut self) -> WRTLOCK_W<12> {
152        WRTLOCK_W::new(self)
153    }
154    #[doc = "Bits 16:22 - Oscillator Calibration"]
155    #[inline(always)]
156    #[must_use]
157    pub fn calib(&mut self) -> CALIB_W<16> {
158        CALIB_W::new(self)
159    }
160    #[doc = "Writes raw bits to the register."]
161    #[inline(always)]
162    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
163        self.0.bits(bits);
164        self
165    }
166}
167#[doc = "32kHz Internal Oscillator (OSC32K) Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [osc32k](index.html) module"]
168pub struct OSC32K_SPEC;
169impl crate::RegisterSpec for OSC32K_SPEC {
170    type Ux = u32;
171}
172#[doc = "`read()` method returns [osc32k::R](R) reader structure"]
173impl crate::Readable for OSC32K_SPEC {
174    type Reader = R;
175}
176#[doc = "`write(|w| ..)` method takes [osc32k::W](W) writer structure"]
177impl crate::Writable for OSC32K_SPEC {
178    type Writer = W;
179    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
180    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
181}
182#[doc = "`reset()` method sets OSC32K to value 0x003f_0080"]
183impl crate::Resettable for OSC32K_SPEC {
184    const RESET_VALUE: Self::Ux = 0x003f_0080;
185}
atsaml21e15b/osc32kctrl/osc32k.rs

atsaml21e15b/osc32kctrl/
osc32k.rs
