[−][src]Type Definition atsame70n21b::usbhs::usbhs_deveptidr_ctrl_mode::W
type W = W<u32, USBHS_DEVEPTIDR_CTRL_MODE>;
Writer for register USBHS_DEVEPTIDR_CTRL_MODE[%s]
Implementations
impl W
[src]
pub fn txinec(&mut self) -> TXINEC_W
[src]
Bit 0 - Transmitted IN Interrupt Clear
pub fn rxoutec(&mut self) -> RXOUTEC_W
[src]
Bit 1 - Received OUT Data Interrupt Clear
pub fn rxstpec(&mut self) -> RXSTPEC_W
[src]
Bit 2 - Received SETUP Interrupt Clear
pub fn nakoutec(&mut self) -> NAKOUTEC_W
[src]
Bit 3 - NAKed OUT Interrupt Clear
pub fn nakinec(&mut self) -> NAKINEC_W
[src]
Bit 4 - NAKed IN Interrupt Clear
pub fn overfec(&mut self) -> OVERFEC_W
[src]
Bit 5 - Overflow Interrupt Clear
pub fn stalledec(&mut self) -> STALLEDEC_W
[src]
Bit 6 - STALLed Interrupt Clear
pub fn shortpacketec(&mut self) -> SHORTPACKETEC_W
[src]
Bit 7 - Shortpacket Interrupt Clear
pub fn nbusybkec(&mut self) -> NBUSYBKEC_W
[src]
Bit 12 - Number of Busy Banks Interrupt Clear
pub fn fifoconc(&mut self) -> FIFOCONC_W
[src]
Bit 14 - FIFO Control Clear
pub fn epdishdmac(&mut self) -> EPDISHDMAC_W
[src]
Bit 16 - Endpoint Interrupts Disable HDMA Request Clear
pub fn nyetdisc(&mut self) -> NYETDISC_W
[src]
Bit 17 - NYET Token Disable Clear
pub fn stallrqc(&mut self) -> STALLRQC_W
[src]
Bit 19 - STALL Request Clear