atsame70j19/qspi/
qspi_mr.rs

1#[doc = "Register `QSPI_MR` reader"]
2pub struct R(crate::R<QSPI_MR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<QSPI_MR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<QSPI_MR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<QSPI_MR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `QSPI_MR` writer"]
17pub struct W(crate::W<QSPI_MR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<QSPI_MR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<QSPI_MR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<QSPI_MR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Serial Memory Mode\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum SMM_A {
40    #[doc = "0: The QSPI is in SPI mode."]
41    SPI = 0,
42    #[doc = "1: The QSPI is in Serial Memory mode."]
43    MEMORY = 1,
44}
45impl From<SMM_A> for bool {
46    #[inline(always)]
47    fn from(variant: SMM_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `SMM` reader - Serial Memory Mode"]
52pub struct SMM_R(crate::FieldReader<bool, SMM_A>);
53impl SMM_R {
54    #[inline(always)]
55    pub(crate) fn new(bits: bool) -> Self {
56        SMM_R(crate::FieldReader::new(bits))
57    }
58    #[doc = r"Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> SMM_A {
61        match self.bits {
62            false => SMM_A::SPI,
63            true => SMM_A::MEMORY,
64        }
65    }
66    #[doc = "Checks if the value of the field is `SPI`"]
67    #[inline(always)]
68    pub fn is_spi(&self) -> bool {
69        **self == SMM_A::SPI
70    }
71    #[doc = "Checks if the value of the field is `MEMORY`"]
72    #[inline(always)]
73    pub fn is_memory(&self) -> bool {
74        **self == SMM_A::MEMORY
75    }
76}
77impl core::ops::Deref for SMM_R {
78    type Target = crate::FieldReader<bool, SMM_A>;
79    #[inline(always)]
80    fn deref(&self) -> &Self::Target {
81        &self.0
82    }
83}
84#[doc = "Field `SMM` writer - Serial Memory Mode"]
85pub struct SMM_W<'a> {
86    w: &'a mut W,
87}
88impl<'a> SMM_W<'a> {
89    #[doc = r"Writes `variant` to the field"]
90    #[inline(always)]
91    pub fn variant(self, variant: SMM_A) -> &'a mut W {
92        self.bit(variant.into())
93    }
94    #[doc = "The QSPI is in SPI mode."]
95    #[inline(always)]
96    pub fn spi(self) -> &'a mut W {
97        self.variant(SMM_A::SPI)
98    }
99    #[doc = "The QSPI is in Serial Memory mode."]
100    #[inline(always)]
101    pub fn memory(self) -> &'a mut W {
102        self.variant(SMM_A::MEMORY)
103    }
104    #[doc = r"Sets the field bit"]
105    #[inline(always)]
106    pub fn set_bit(self) -> &'a mut W {
107        self.bit(true)
108    }
109    #[doc = r"Clears the field bit"]
110    #[inline(always)]
111    pub fn clear_bit(self) -> &'a mut W {
112        self.bit(false)
113    }
114    #[doc = r"Writes raw bits to the field"]
115    #[inline(always)]
116    pub fn bit(self, value: bool) -> &'a mut W {
117        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
118        self.w
119    }
120}
121#[doc = "Local Loopback Enable\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum LLB_A {
124    #[doc = "0: Local loopback path disabled."]
125    DISABLED = 0,
126    #[doc = "1: Local loopback path enabled."]
127    ENABLED = 1,
128}
129impl From<LLB_A> for bool {
130    #[inline(always)]
131    fn from(variant: LLB_A) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `LLB` reader - Local Loopback Enable"]
136pub struct LLB_R(crate::FieldReader<bool, LLB_A>);
137impl LLB_R {
138    #[inline(always)]
139    pub(crate) fn new(bits: bool) -> Self {
140        LLB_R(crate::FieldReader::new(bits))
141    }
142    #[doc = r"Get enumerated values variant"]
143    #[inline(always)]
144    pub fn variant(&self) -> LLB_A {
145        match self.bits {
146            false => LLB_A::DISABLED,
147            true => LLB_A::ENABLED,
148        }
149    }
150    #[doc = "Checks if the value of the field is `DISABLED`"]
151    #[inline(always)]
152    pub fn is_disabled(&self) -> bool {
153        **self == LLB_A::DISABLED
154    }
155    #[doc = "Checks if the value of the field is `ENABLED`"]
156    #[inline(always)]
157    pub fn is_enabled(&self) -> bool {
158        **self == LLB_A::ENABLED
159    }
160}
161impl core::ops::Deref for LLB_R {
162    type Target = crate::FieldReader<bool, LLB_A>;
163    #[inline(always)]
164    fn deref(&self) -> &Self::Target {
165        &self.0
166    }
167}
168#[doc = "Field `LLB` writer - Local Loopback Enable"]
169pub struct LLB_W<'a> {
170    w: &'a mut W,
171}
172impl<'a> LLB_W<'a> {
173    #[doc = r"Writes `variant` to the field"]
174    #[inline(always)]
175    pub fn variant(self, variant: LLB_A) -> &'a mut W {
176        self.bit(variant.into())
177    }
178    #[doc = "Local loopback path disabled."]
179    #[inline(always)]
180    pub fn disabled(self) -> &'a mut W {
181        self.variant(LLB_A::DISABLED)
182    }
183    #[doc = "Local loopback path enabled."]
184    #[inline(always)]
185    pub fn enabled(self) -> &'a mut W {
186        self.variant(LLB_A::ENABLED)
187    }
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
202        self.w
203    }
204}
205#[doc = "Wait Data Read Before Transfer\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq)]
207pub enum WDRBT_A {
208    #[doc = "0: No effect. In SPI mode, a transfer can be initiated whatever the state of the QSPI_RDR is."]
209    DISABLED = 0,
210    #[doc = "1: In SPI mode, a transfer can start only if the QSPI_RDR is empty, i.e., does not contain any unread data. This mode prevents overrun error in reception."]
211    ENABLED = 1,
212}
213impl From<WDRBT_A> for bool {
214    #[inline(always)]
215    fn from(variant: WDRBT_A) -> Self {
216        variant as u8 != 0
217    }
218}
219#[doc = "Field `WDRBT` reader - Wait Data Read Before Transfer"]
220pub struct WDRBT_R(crate::FieldReader<bool, WDRBT_A>);
221impl WDRBT_R {
222    #[inline(always)]
223    pub(crate) fn new(bits: bool) -> Self {
224        WDRBT_R(crate::FieldReader::new(bits))
225    }
226    #[doc = r"Get enumerated values variant"]
227    #[inline(always)]
228    pub fn variant(&self) -> WDRBT_A {
229        match self.bits {
230            false => WDRBT_A::DISABLED,
231            true => WDRBT_A::ENABLED,
232        }
233    }
234    #[doc = "Checks if the value of the field is `DISABLED`"]
235    #[inline(always)]
236    pub fn is_disabled(&self) -> bool {
237        **self == WDRBT_A::DISABLED
238    }
239    #[doc = "Checks if the value of the field is `ENABLED`"]
240    #[inline(always)]
241    pub fn is_enabled(&self) -> bool {
242        **self == WDRBT_A::ENABLED
243    }
244}
245impl core::ops::Deref for WDRBT_R {
246    type Target = crate::FieldReader<bool, WDRBT_A>;
247    #[inline(always)]
248    fn deref(&self) -> &Self::Target {
249        &self.0
250    }
251}
252#[doc = "Field `WDRBT` writer - Wait Data Read Before Transfer"]
253pub struct WDRBT_W<'a> {
254    w: &'a mut W,
255}
256impl<'a> WDRBT_W<'a> {
257    #[doc = r"Writes `variant` to the field"]
258    #[inline(always)]
259    pub fn variant(self, variant: WDRBT_A) -> &'a mut W {
260        self.bit(variant.into())
261    }
262    #[doc = "No effect. In SPI mode, a transfer can be initiated whatever the state of the QSPI_RDR is."]
263    #[inline(always)]
264    pub fn disabled(self) -> &'a mut W {
265        self.variant(WDRBT_A::DISABLED)
266    }
267    #[doc = "In SPI mode, a transfer can start only if the QSPI_RDR is empty, i.e., does not contain any unread data. This mode prevents overrun error in reception."]
268    #[inline(always)]
269    pub fn enabled(self) -> &'a mut W {
270        self.variant(WDRBT_A::ENABLED)
271    }
272    #[doc = r"Sets the field bit"]
273    #[inline(always)]
274    pub fn set_bit(self) -> &'a mut W {
275        self.bit(true)
276    }
277    #[doc = r"Clears the field bit"]
278    #[inline(always)]
279    pub fn clear_bit(self) -> &'a mut W {
280        self.bit(false)
281    }
282    #[doc = r"Writes raw bits to the field"]
283    #[inline(always)]
284    pub fn bit(self, value: bool) -> &'a mut W {
285        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
286        self.w
287    }
288}
289#[doc = "Chip Select Mode\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq)]
291#[repr(u8)]
292pub enum CSMODE_A {
293    #[doc = "0: The chip select is deasserted if QSPI_TDR.TD has not been reloaded before the end of the current transfer."]
294    NOT_RELOADED = 0,
295    #[doc = "1: The chip select is deasserted when the bit LASTXFER is written at 1 and the character written in QSPI_TDR.TD has been transferred."]
296    LASTXFER = 1,
297    #[doc = "2: The chip select is deasserted systematically after each transfer."]
298    SYSTEMATICALLY = 2,
299}
300impl From<CSMODE_A> for u8 {
301    #[inline(always)]
302    fn from(variant: CSMODE_A) -> Self {
303        variant as _
304    }
305}
306#[doc = "Field `CSMODE` reader - Chip Select Mode"]
307pub struct CSMODE_R(crate::FieldReader<u8, CSMODE_A>);
308impl CSMODE_R {
309    #[inline(always)]
310    pub(crate) fn new(bits: u8) -> Self {
311        CSMODE_R(crate::FieldReader::new(bits))
312    }
313    #[doc = r"Get enumerated values variant"]
314    #[inline(always)]
315    pub fn variant(&self) -> Option<CSMODE_A> {
316        match self.bits {
317            0 => Some(CSMODE_A::NOT_RELOADED),
318            1 => Some(CSMODE_A::LASTXFER),
319            2 => Some(CSMODE_A::SYSTEMATICALLY),
320            _ => None,
321        }
322    }
323    #[doc = "Checks if the value of the field is `NOT_RELOADED`"]
324    #[inline(always)]
325    pub fn is_not_reloaded(&self) -> bool {
326        **self == CSMODE_A::NOT_RELOADED
327    }
328    #[doc = "Checks if the value of the field is `LASTXFER`"]
329    #[inline(always)]
330    pub fn is_lastxfer(&self) -> bool {
331        **self == CSMODE_A::LASTXFER
332    }
333    #[doc = "Checks if the value of the field is `SYSTEMATICALLY`"]
334    #[inline(always)]
335    pub fn is_systematically(&self) -> bool {
336        **self == CSMODE_A::SYSTEMATICALLY
337    }
338}
339impl core::ops::Deref for CSMODE_R {
340    type Target = crate::FieldReader<u8, CSMODE_A>;
341    #[inline(always)]
342    fn deref(&self) -> &Self::Target {
343        &self.0
344    }
345}
346#[doc = "Field `CSMODE` writer - Chip Select Mode"]
347pub struct CSMODE_W<'a> {
348    w: &'a mut W,
349}
350impl<'a> CSMODE_W<'a> {
351    #[doc = r"Writes `variant` to the field"]
352    #[inline(always)]
353    pub fn variant(self, variant: CSMODE_A) -> &'a mut W {
354        unsafe { self.bits(variant.into()) }
355    }
356    #[doc = "The chip select is deasserted if QSPI_TDR.TD has not been reloaded before the end of the current transfer."]
357    #[inline(always)]
358    pub fn not_reloaded(self) -> &'a mut W {
359        self.variant(CSMODE_A::NOT_RELOADED)
360    }
361    #[doc = "The chip select is deasserted when the bit LASTXFER is written at 1 and the character written in QSPI_TDR.TD has been transferred."]
362    #[inline(always)]
363    pub fn lastxfer(self) -> &'a mut W {
364        self.variant(CSMODE_A::LASTXFER)
365    }
366    #[doc = "The chip select is deasserted systematically after each transfer."]
367    #[inline(always)]
368    pub fn systematically(self) -> &'a mut W {
369        self.variant(CSMODE_A::SYSTEMATICALLY)
370    }
371    #[doc = r"Writes raw bits to the field"]
372    #[inline(always)]
373    pub unsafe fn bits(self, value: u8) -> &'a mut W {
374        self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4);
375        self.w
376    }
377}
378#[doc = "Number Of Bits Per Transfer\n\nValue on reset: 0"]
379#[derive(Clone, Copy, Debug, PartialEq)]
380#[repr(u8)]
381pub enum NBBITS_A {
382    #[doc = "0: 8 bits for transfer"]
383    _8_BIT = 0,
384    #[doc = "8: 16 bits for transfer"]
385    _16_BIT = 8,
386}
387impl From<NBBITS_A> for u8 {
388    #[inline(always)]
389    fn from(variant: NBBITS_A) -> Self {
390        variant as _
391    }
392}
393#[doc = "Field `NBBITS` reader - Number Of Bits Per Transfer"]
394pub struct NBBITS_R(crate::FieldReader<u8, NBBITS_A>);
395impl NBBITS_R {
396    #[inline(always)]
397    pub(crate) fn new(bits: u8) -> Self {
398        NBBITS_R(crate::FieldReader::new(bits))
399    }
400    #[doc = r"Get enumerated values variant"]
401    #[inline(always)]
402    pub fn variant(&self) -> Option<NBBITS_A> {
403        match self.bits {
404            0 => Some(NBBITS_A::_8_BIT),
405            8 => Some(NBBITS_A::_16_BIT),
406            _ => None,
407        }
408    }
409    #[doc = "Checks if the value of the field is `_8_BIT`"]
410    #[inline(always)]
411    pub fn is_8_bit(&self) -> bool {
412        **self == NBBITS_A::_8_BIT
413    }
414    #[doc = "Checks if the value of the field is `_16_BIT`"]
415    #[inline(always)]
416    pub fn is_16_bit(&self) -> bool {
417        **self == NBBITS_A::_16_BIT
418    }
419}
420impl core::ops::Deref for NBBITS_R {
421    type Target = crate::FieldReader<u8, NBBITS_A>;
422    #[inline(always)]
423    fn deref(&self) -> &Self::Target {
424        &self.0
425    }
426}
427#[doc = "Field `NBBITS` writer - Number Of Bits Per Transfer"]
428pub struct NBBITS_W<'a> {
429    w: &'a mut W,
430}
431impl<'a> NBBITS_W<'a> {
432    #[doc = r"Writes `variant` to the field"]
433    #[inline(always)]
434    pub fn variant(self, variant: NBBITS_A) -> &'a mut W {
435        unsafe { self.bits(variant.into()) }
436    }
437    #[doc = "8 bits for transfer"]
438    #[inline(always)]
439    pub fn _8_bit(self) -> &'a mut W {
440        self.variant(NBBITS_A::_8_BIT)
441    }
442    #[doc = "16 bits for transfer"]
443    #[inline(always)]
444    pub fn _16_bit(self) -> &'a mut W {
445        self.variant(NBBITS_A::_16_BIT)
446    }
447    #[doc = r"Writes raw bits to the field"]
448    #[inline(always)]
449    pub unsafe fn bits(self, value: u8) -> &'a mut W {
450        self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8);
451        self.w
452    }
453}
454#[doc = "Field `DLYBCT` reader - Delay Between Consecutive Transfers"]
455pub struct DLYBCT_R(crate::FieldReader<u8, u8>);
456impl DLYBCT_R {
457    #[inline(always)]
458    pub(crate) fn new(bits: u8) -> Self {
459        DLYBCT_R(crate::FieldReader::new(bits))
460    }
461}
462impl core::ops::Deref for DLYBCT_R {
463    type Target = crate::FieldReader<u8, u8>;
464    #[inline(always)]
465    fn deref(&self) -> &Self::Target {
466        &self.0
467    }
468}
469#[doc = "Field `DLYBCT` writer - Delay Between Consecutive Transfers"]
470pub struct DLYBCT_W<'a> {
471    w: &'a mut W,
472}
473impl<'a> DLYBCT_W<'a> {
474    #[doc = r"Writes raw bits to the field"]
475    #[inline(always)]
476    pub unsafe fn bits(self, value: u8) -> &'a mut W {
477        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
478        self.w
479    }
480}
481#[doc = "Field `DLYCS` reader - Minimum Inactive QCS Delay"]
482pub struct DLYCS_R(crate::FieldReader<u8, u8>);
483impl DLYCS_R {
484    #[inline(always)]
485    pub(crate) fn new(bits: u8) -> Self {
486        DLYCS_R(crate::FieldReader::new(bits))
487    }
488}
489impl core::ops::Deref for DLYCS_R {
490    type Target = crate::FieldReader<u8, u8>;
491    #[inline(always)]
492    fn deref(&self) -> &Self::Target {
493        &self.0
494    }
495}
496#[doc = "Field `DLYCS` writer - Minimum Inactive QCS Delay"]
497pub struct DLYCS_W<'a> {
498    w: &'a mut W,
499}
500impl<'a> DLYCS_W<'a> {
501    #[doc = r"Writes raw bits to the field"]
502    #[inline(always)]
503    pub unsafe fn bits(self, value: u8) -> &'a mut W {
504        self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24);
505        self.w
506    }
507}
508impl R {
509    #[doc = "Bit 0 - Serial Memory Mode"]
510    #[inline(always)]
511    pub fn smm(&self) -> SMM_R {
512        SMM_R::new((self.bits & 0x01) != 0)
513    }
514    #[doc = "Bit 1 - Local Loopback Enable"]
515    #[inline(always)]
516    pub fn llb(&self) -> LLB_R {
517        LLB_R::new(((self.bits >> 1) & 0x01) != 0)
518    }
519    #[doc = "Bit 2 - Wait Data Read Before Transfer"]
520    #[inline(always)]
521    pub fn wdrbt(&self) -> WDRBT_R {
522        WDRBT_R::new(((self.bits >> 2) & 0x01) != 0)
523    }
524    #[doc = "Bits 4:5 - Chip Select Mode"]
525    #[inline(always)]
526    pub fn csmode(&self) -> CSMODE_R {
527        CSMODE_R::new(((self.bits >> 4) & 0x03) as u8)
528    }
529    #[doc = "Bits 8:11 - Number Of Bits Per Transfer"]
530    #[inline(always)]
531    pub fn nbbits(&self) -> NBBITS_R {
532        NBBITS_R::new(((self.bits >> 8) & 0x0f) as u8)
533    }
534    #[doc = "Bits 16:23 - Delay Between Consecutive Transfers"]
535    #[inline(always)]
536    pub fn dlybct(&self) -> DLYBCT_R {
537        DLYBCT_R::new(((self.bits >> 16) & 0xff) as u8)
538    }
539    #[doc = "Bits 24:31 - Minimum Inactive QCS Delay"]
540    #[inline(always)]
541    pub fn dlycs(&self) -> DLYCS_R {
542        DLYCS_R::new(((self.bits >> 24) & 0xff) as u8)
543    }
544}
545impl W {
546    #[doc = "Bit 0 - Serial Memory Mode"]
547    #[inline(always)]
548    pub fn smm(&mut self) -> SMM_W {
549        SMM_W { w: self }
550    }
551    #[doc = "Bit 1 - Local Loopback Enable"]
552    #[inline(always)]
553    pub fn llb(&mut self) -> LLB_W {
554        LLB_W { w: self }
555    }
556    #[doc = "Bit 2 - Wait Data Read Before Transfer"]
557    #[inline(always)]
558    pub fn wdrbt(&mut self) -> WDRBT_W {
559        WDRBT_W { w: self }
560    }
561    #[doc = "Bits 4:5 - Chip Select Mode"]
562    #[inline(always)]
563    pub fn csmode(&mut self) -> CSMODE_W {
564        CSMODE_W { w: self }
565    }
566    #[doc = "Bits 8:11 - Number Of Bits Per Transfer"]
567    #[inline(always)]
568    pub fn nbbits(&mut self) -> NBBITS_W {
569        NBBITS_W { w: self }
570    }
571    #[doc = "Bits 16:23 - Delay Between Consecutive Transfers"]
572    #[inline(always)]
573    pub fn dlybct(&mut self) -> DLYBCT_W {
574        DLYBCT_W { w: self }
575    }
576    #[doc = "Bits 24:31 - Minimum Inactive QCS Delay"]
577    #[inline(always)]
578    pub fn dlycs(&mut self) -> DLYCS_W {
579        DLYCS_W { w: self }
580    }
581    #[doc = "Writes raw bits to the register."]
582    #[inline(always)]
583    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
584        self.0.bits(bits);
585        self
586    }
587}
588#[doc = "Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [qspi_mr](index.html) module"]
589pub struct QSPI_MR_SPEC;
590impl crate::RegisterSpec for QSPI_MR_SPEC {
591    type Ux = u32;
592}
593#[doc = "`read()` method returns [qspi_mr::R](R) reader structure"]
594impl crate::Readable for QSPI_MR_SPEC {
595    type Reader = R;
596}
597#[doc = "`write(|w| ..)` method takes [qspi_mr::W](W) writer structure"]
598impl crate::Writable for QSPI_MR_SPEC {
599    type Writer = W;
600}
601#[doc = "`reset()` method sets QSPI_MR to value 0"]
602impl crate::Resettable for QSPI_MR_SPEC {
603    #[inline(always)]
604    fn reset_value() -> Self::Ux {
605        0
606    }
607}
atsame70j19/qspi/qspi_mr.rs

atsame70j19/qspi/
qspi_mr.rs
