atsamd51p20a/nvmctrl/
ctrlb.rs

1#[doc = "Writer for register CTRLB"]
2pub type W = crate::W<u16, super::CTRLB>;
3#[doc = "Register CTRLB `reset()`'s with value 0"]
4impl crate::ResetValue for super::CTRLB {
5    type Type = u16;
6    #[inline(always)]
7    fn reset_value() -> Self::Type {
8        0
9    }
10}
11#[doc = "Command\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq)]
13#[repr(u8)]
14pub enum CMD_AW {
15    #[doc = "0: Erase Page - Only supported in the USER and AUX pages."]
16    EP = 0,
17    #[doc = "1: Erase Block - Erases the block addressed by the ADDR register, not supported in the user page"]
18    EB = 1,
19    #[doc = "3: Write Page - Writes the contents of the page buffer to the page addressed by the ADDR register, not supported in the user page"]
20    WP = 3,
21    #[doc = "4: Write Quad Word - Writes a 128-bit word at the location addressed by the ADDR register."]
22    WQW = 4,
23    #[doc = "16: Software Reset - Power-Cycle the NVM memory and replay the device automatic calibration procedure and resets the module configuration registers"]
24    SWRST = 16,
25    #[doc = "17: Lock Region - Locks the region containing the address location in the ADDR register."]
26    LR = 17,
27    #[doc = "18: Unlock Region - Unlocks the region containing the address location in the ADDR register."]
28    UR = 18,
29    #[doc = "19: Sets the power reduction mode."]
30    SPRM = 19,
31    #[doc = "20: Clears the power reduction mode."]
32    CPRM = 20,
33    #[doc = "21: Page Buffer Clear - Clears the page buffer."]
34    PBC = 21,
35    #[doc = "22: Set Security Bit"]
36    SSB = 22,
37    #[doc = "23: Bank swap and system reset, if SMEE is used also reallocate SMEE data into the opposite BANK"]
38    BKSWRST = 23,
39    #[doc = "24: Chip Erase Lock - DSU.CE command is not available"]
40    CELCK = 24,
41    #[doc = "25: Chip Erase Unlock - DSU.CE command is available"]
42    CEULCK = 25,
43    #[doc = "26: Sets STATUS.BPDIS, Boot loader protection is discarded until CBPDIS is issued or next start-up sequence"]
44    SBPDIS = 26,
45    #[doc = "27: Clears STATUS.BPDIS, Boot loader protection is not discarded"]
46    CBPDIS = 27,
47    #[doc = "48: Activate SmartEEPROM Sector 0, deactivate Sector 1"]
48    ASEES0 = 48,
49    #[doc = "49: Activate SmartEEPROM Sector 1, deactivate Sector 0"]
50    ASEES1 = 49,
51    #[doc = "50: Starts SmartEEPROM sector reallocation algorithm"]
52    SEERALOC = 50,
53    #[doc = "51: Flush SMEE data when in buffered mode"]
54    SEEFLUSH = 51,
55    #[doc = "52: Lock access to SmartEEPROM data from any mean"]
56    LSEE = 52,
57    #[doc = "53: Unlock access to SmartEEPROM data"]
58    USEE = 53,
59    #[doc = "54: Lock access to the SmartEEPROM Register Address Space (above 64KB)"]
60    LSEER = 54,
61    #[doc = "55: Unlock access to the SmartEEPROM Register Address Space (above 64KB)"]
62    USEER = 55,
63}
64impl From<CMD_AW> for u8 {
65    #[inline(always)]
66    fn from(variant: CMD_AW) -> Self {
67        variant as _
68    }
69}
70#[doc = "Write proxy for field `CMD`"]
71pub struct CMD_W<'a> {
72    w: &'a mut W,
73}
74impl<'a> CMD_W<'a> {
75    #[doc = r"Writes `variant` to the field"]
76    #[inline(always)]
77    pub fn variant(self, variant: CMD_AW) -> &'a mut W {
78        unsafe { self.bits(variant.into()) }
79    }
80    #[doc = "Erase Page - Only supported in the USER and AUX pages."]
81    #[inline(always)]
82    pub fn ep(self) -> &'a mut W {
83        self.variant(CMD_AW::EP)
84    }
85    #[doc = "Erase Block - Erases the block addressed by the ADDR register, not supported in the user page"]
86    #[inline(always)]
87    pub fn eb(self) -> &'a mut W {
88        self.variant(CMD_AW::EB)
89    }
90    #[doc = "Write Page - Writes the contents of the page buffer to the page addressed by the ADDR register, not supported in the user page"]
91    #[inline(always)]
92    pub fn wp(self) -> &'a mut W {
93        self.variant(CMD_AW::WP)
94    }
95    #[doc = "Write Quad Word - Writes a 128-bit word at the location addressed by the ADDR register."]
96    #[inline(always)]
97    pub fn wqw(self) -> &'a mut W {
98        self.variant(CMD_AW::WQW)
99    }
100    #[doc = "Software Reset - Power-Cycle the NVM memory and replay the device automatic calibration procedure and resets the module configuration registers"]
101    #[inline(always)]
102    pub fn swrst(self) -> &'a mut W {
103        self.variant(CMD_AW::SWRST)
104    }
105    #[doc = "Lock Region - Locks the region containing the address location in the ADDR register."]
106    #[inline(always)]
107    pub fn lr(self) -> &'a mut W {
108        self.variant(CMD_AW::LR)
109    }
110    #[doc = "Unlock Region - Unlocks the region containing the address location in the ADDR register."]
111    #[inline(always)]
112    pub fn ur(self) -> &'a mut W {
113        self.variant(CMD_AW::UR)
114    }
115    #[doc = "Sets the power reduction mode."]
116    #[inline(always)]
117    pub fn sprm(self) -> &'a mut W {
118        self.variant(CMD_AW::SPRM)
119    }
120    #[doc = "Clears the power reduction mode."]
121    #[inline(always)]
122    pub fn cprm(self) -> &'a mut W {
123        self.variant(CMD_AW::CPRM)
124    }
125    #[doc = "Page Buffer Clear - Clears the page buffer."]
126    #[inline(always)]
127    pub fn pbc(self) -> &'a mut W {
128        self.variant(CMD_AW::PBC)
129    }
130    #[doc = "Set Security Bit"]
131    #[inline(always)]
132    pub fn ssb(self) -> &'a mut W {
133        self.variant(CMD_AW::SSB)
134    }
135    #[doc = "Bank swap and system reset, if SMEE is used also reallocate SMEE data into the opposite BANK"]
136    #[inline(always)]
137    pub fn bkswrst(self) -> &'a mut W {
138        self.variant(CMD_AW::BKSWRST)
139    }
140    #[doc = "Chip Erase Lock - DSU.CE command is not available"]
141    #[inline(always)]
142    pub fn celck(self) -> &'a mut W {
143        self.variant(CMD_AW::CELCK)
144    }
145    #[doc = "Chip Erase Unlock - DSU.CE command is available"]
146    #[inline(always)]
147    pub fn ceulck(self) -> &'a mut W {
148        self.variant(CMD_AW::CEULCK)
149    }
150    #[doc = "Sets STATUS.BPDIS, Boot loader protection is discarded until CBPDIS is issued or next start-up sequence"]
151    #[inline(always)]
152    pub fn sbpdis(self) -> &'a mut W {
153        self.variant(CMD_AW::SBPDIS)
154    }
155    #[doc = "Clears STATUS.BPDIS, Boot loader protection is not discarded"]
156    #[inline(always)]
157    pub fn cbpdis(self) -> &'a mut W {
158        self.variant(CMD_AW::CBPDIS)
159    }
160    #[doc = "Activate SmartEEPROM Sector 0, deactivate Sector 1"]
161    #[inline(always)]
162    pub fn asees0(self) -> &'a mut W {
163        self.variant(CMD_AW::ASEES0)
164    }
165    #[doc = "Activate SmartEEPROM Sector 1, deactivate Sector 0"]
166    #[inline(always)]
167    pub fn asees1(self) -> &'a mut W {
168        self.variant(CMD_AW::ASEES1)
169    }
170    #[doc = "Starts SmartEEPROM sector reallocation algorithm"]
171    #[inline(always)]
172    pub fn seeraloc(self) -> &'a mut W {
173        self.variant(CMD_AW::SEERALOC)
174    }
175    #[doc = "Flush SMEE data when in buffered mode"]
176    #[inline(always)]
177    pub fn seeflush(self) -> &'a mut W {
178        self.variant(CMD_AW::SEEFLUSH)
179    }
180    #[doc = "Lock access to SmartEEPROM data from any mean"]
181    #[inline(always)]
182    pub fn lsee(self) -> &'a mut W {
183        self.variant(CMD_AW::LSEE)
184    }
185    #[doc = "Unlock access to SmartEEPROM data"]
186    #[inline(always)]
187    pub fn usee(self) -> &'a mut W {
188        self.variant(CMD_AW::USEE)
189    }
190    #[doc = "Lock access to the SmartEEPROM Register Address Space (above 64KB)"]
191    #[inline(always)]
192    pub fn lseer(self) -> &'a mut W {
193        self.variant(CMD_AW::LSEER)
194    }
195    #[doc = "Unlock access to the SmartEEPROM Register Address Space (above 64KB)"]
196    #[inline(always)]
197    pub fn useer(self) -> &'a mut W {
198        self.variant(CMD_AW::USEER)
199    }
200    #[doc = r"Writes raw bits to the field"]
201    #[inline(always)]
202    pub unsafe fn bits(self, value: u8) -> &'a mut W {
203        self.w.bits = (self.w.bits & !0x7f) | ((value as u16) & 0x7f);
204        self.w
205    }
206}
207#[doc = "Command Execution\n\nValue on reset: 0"]
208#[derive(Clone, Copy, Debug, PartialEq)]
209#[repr(u8)]
210pub enum CMDEX_AW {
211    #[doc = "165: Execution Key"]
212    KEY = 165,
213}
214impl From<CMDEX_AW> for u8 {
215    #[inline(always)]
216    fn from(variant: CMDEX_AW) -> Self {
217        variant as _
218    }
219}
220#[doc = "Write proxy for field `CMDEX`"]
221pub struct CMDEX_W<'a> {
222    w: &'a mut W,
223}
224impl<'a> CMDEX_W<'a> {
225    #[doc = r"Writes `variant` to the field"]
226    #[inline(always)]
227    pub fn variant(self, variant: CMDEX_AW) -> &'a mut W {
228        unsafe { self.bits(variant.into()) }
229    }
230    #[doc = "Execution Key"]
231    #[inline(always)]
232    pub fn key(self) -> &'a mut W {
233        self.variant(CMDEX_AW::KEY)
234    }
235    #[doc = r"Writes raw bits to the field"]
236    #[inline(always)]
237    pub unsafe fn bits(self, value: u8) -> &'a mut W {
238        self.w.bits = (self.w.bits & !(0xff << 8)) | (((value as u16) & 0xff) << 8);
239        self.w
240    }
241}
242impl W {
243    #[doc = "Bits 0:6 - Command"]
244    #[inline(always)]
245    pub fn cmd(&mut self) -> CMD_W {
246        CMD_W { w: self }
247    }
248    #[doc = "Bits 8:15 - Command Execution"]
249    #[inline(always)]
250    pub fn cmdex(&mut self) -> CMDEX_W {
251        CMDEX_W { w: self }
252    }
253}
atsamd51p20a/nvmctrl/ctrlb.rs

atsamd51p20a/nvmctrl/
ctrlb.rs
