1#[doc = "Writer for register CTRL"]
2pub type W = crate::W<u32, super::CTRL>;
3#[doc = "Register CTRL `reset()`'s with value 0"]
4impl crate::ResetValue for super::CTRL {
5 type Type = u32;
6 #[inline(always)]
7 fn reset_value() -> Self::Type {
8 0
9 }
10}
11#[doc = "Write proxy for field `ENABLE`"]
12pub struct ENABLE_W<'a> {
13 w: &'a mut W,
14}
15impl<'a> ENABLE_W<'a> {
16 #[doc = r"Sets the field bit"]
17 #[inline(always)]
18 pub fn set_bit(self) -> &'a mut W {
19 self.bit(true)
20 }
21 #[doc = r"Clears the field bit"]
22 #[inline(always)]
23 pub fn clear_bit(self) -> &'a mut W {
24 self.bit(false)
25 }
26 #[doc = r"Writes raw bits to the field"]
27 #[inline(always)]
28 pub fn bit(self, value: bool) -> &'a mut W {
29 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
30 self.w
31 }
32}
33#[doc = "Write proxy for field `DISABLE`"]
34pub struct DISABLE_W<'a> {
35 w: &'a mut W,
36}
37impl<'a> DISABLE_W<'a> {
38 #[doc = r"Sets the field bit"]
39 #[inline(always)]
40 pub fn set_bit(self) -> &'a mut W {
41 self.bit(true)
42 }
43 #[doc = r"Clears the field bit"]
44 #[inline(always)]
45 pub fn clear_bit(self) -> &'a mut W {
46 self.bit(false)
47 }
48 #[doc = r"Writes raw bits to the field"]
49 #[inline(always)]
50 pub fn bit(self, value: bool) -> &'a mut W {
51 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
52 self.w
53 }
54}
55#[doc = "Write proxy for field `SWRST`"]
56pub struct SWRST_W<'a> {
57 w: &'a mut W,
58}
59impl<'a> SWRST_W<'a> {
60 #[doc = r"Sets the field bit"]
61 #[inline(always)]
62 pub fn set_bit(self) -> &'a mut W {
63 self.bit(true)
64 }
65 #[doc = r"Clears the field bit"]
66 #[inline(always)]
67 pub fn clear_bit(self) -> &'a mut W {
68 self.bit(false)
69 }
70 #[doc = r"Writes raw bits to the field"]
71 #[inline(always)]
72 pub fn bit(self, value: bool) -> &'a mut W {
73 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
74 self.w
75 }
76}
77#[doc = "Write proxy for field `REHASH`"]
78pub struct REHASH_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> REHASH_W<'a> {
82 #[doc = r"Writes raw bits to the field"]
83 #[inline(always)]
84 pub unsafe fn bits(self, value: u8) -> &'a mut W {
85 self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
86 self.w
87 }
88}
89#[doc = "Write proxy for field `RMDIS`"]
90pub struct RMDIS_W<'a> {
91 w: &'a mut W,
92}
93impl<'a> RMDIS_W<'a> {
94 #[doc = r"Writes raw bits to the field"]
95 #[inline(always)]
96 pub unsafe fn bits(self, value: u8) -> &'a mut W {
97 self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
98 self.w
99 }
100}
101#[doc = "Write proxy for field `RMEN`"]
102pub struct RMEN_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> RMEN_W<'a> {
106 #[doc = r"Writes raw bits to the field"]
107 #[inline(always)]
108 pub unsafe fn bits(self, value: u8) -> &'a mut W {
109 self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
110 self.w
111 }
112}
113impl W {
114 #[doc = "Bit 0 - ICM Enable"]
115 #[inline(always)]
116 pub fn enable(&mut self) -> ENABLE_W {
117 ENABLE_W { w: self }
118 }
119 #[doc = "Bit 1 - ICM Disable Register"]
120 #[inline(always)]
121 pub fn disable(&mut self) -> DISABLE_W {
122 DISABLE_W { w: self }
123 }
124 #[doc = "Bit 2 - Software Reset"]
125 #[inline(always)]
126 pub fn swrst(&mut self) -> SWRST_W {
127 SWRST_W { w: self }
128 }
129 #[doc = "Bits 4:7 - Recompute Internal Hash"]
130 #[inline(always)]
131 pub fn rehash(&mut self) -> REHASH_W {
132 REHASH_W { w: self }
133 }
134 #[doc = "Bits 8:11 - Region Monitoring Disable"]
135 #[inline(always)]
136 pub fn rmdis(&mut self) -> RMDIS_W {
137 RMDIS_W { w: self }
138 }
139 #[doc = "Bits 12:15 - Region Monitoring Enable"]
140 #[inline(always)]
141 pub fn rmen(&mut self) -> RMEN_W {
142 RMEN_W { w: self }
143 }
144}