atsamd51n20a/
osc32kctrl.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - Interrupt Enable Clear"]
5    pub intenclr: INTENCLR,
6    #[doc = "0x04 - Interrupt Enable Set"]
7    pub intenset: INTENSET,
8    #[doc = "0x08 - Interrupt Flag Status and Clear"]
9    pub intflag: INTFLAG,
10    #[doc = "0x0c - Power and Clocks Status"]
11    pub status: STATUS,
12    #[doc = "0x10 - RTC Clock Selection"]
13    pub rtcctrl: RTCCTRL,
14    _reserved5: [u8; 3usize],
15    #[doc = "0x14 - 32kHz External Crystal Oscillator (XOSC32K) Control"]
16    pub xosc32k: XOSC32K,
17    #[doc = "0x16 - Clock Failure Detector Control"]
18    pub cfdctrl: CFDCTRL,
19    #[doc = "0x17 - Event Control"]
20    pub evctrl: EVCTRL,
21    _reserved8: [u8; 4usize],
22    #[doc = "0x1c - 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control"]
23    pub osculp32k: OSCULP32K,
24}
25#[doc = "Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](intenclr) module"]
26pub type INTENCLR = crate::Reg<u32, _INTENCLR>;
27#[allow(missing_docs)]
28#[doc(hidden)]
29pub struct _INTENCLR;
30#[doc = "`read()` method returns [intenclr::R](intenclr::R) reader structure"]
31impl crate::Readable for INTENCLR {}
32#[doc = "`write(|w| ..)` method takes [intenclr::W](intenclr::W) writer structure"]
33impl crate::Writable for INTENCLR {}
34#[doc = "Interrupt Enable Clear"]
35pub mod intenclr;
36#[doc = "Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](intenset) module"]
37pub type INTENSET = crate::Reg<u32, _INTENSET>;
38#[allow(missing_docs)]
39#[doc(hidden)]
40pub struct _INTENSET;
41#[doc = "`read()` method returns [intenset::R](intenset::R) reader structure"]
42impl crate::Readable for INTENSET {}
43#[doc = "`write(|w| ..)` method takes [intenset::W](intenset::W) writer structure"]
44impl crate::Writable for INTENSET {}
45#[doc = "Interrupt Enable Set"]
46pub mod intenset;
47#[doc = "Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](intflag) module"]
48pub type INTFLAG = crate::Reg<u32, _INTFLAG>;
49#[allow(missing_docs)]
50#[doc(hidden)]
51pub struct _INTFLAG;
52#[doc = "`read()` method returns [intflag::R](intflag::R) reader structure"]
53impl crate::Readable for INTFLAG {}
54#[doc = "`write(|w| ..)` method takes [intflag::W](intflag::W) writer structure"]
55impl crate::Writable for INTFLAG {}
56#[doc = "Interrupt Flag Status and Clear"]
57pub mod intflag;
58#[doc = "Power and Clocks Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](status) module"]
59pub type STATUS = crate::Reg<u32, _STATUS>;
60#[allow(missing_docs)]
61#[doc(hidden)]
62pub struct _STATUS;
63#[doc = "`read()` method returns [status::R](status::R) reader structure"]
64impl crate::Readable for STATUS {}
65#[doc = "Power and Clocks Status"]
66pub mod status;
67#[doc = "RTC Clock Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rtcctrl](rtcctrl) module"]
68pub type RTCCTRL = crate::Reg<u8, _RTCCTRL>;
69#[allow(missing_docs)]
70#[doc(hidden)]
71pub struct _RTCCTRL;
72#[doc = "`read()` method returns [rtcctrl::R](rtcctrl::R) reader structure"]
73impl crate::Readable for RTCCTRL {}
74#[doc = "`write(|w| ..)` method takes [rtcctrl::W](rtcctrl::W) writer structure"]
75impl crate::Writable for RTCCTRL {}
76#[doc = "RTC Clock Selection"]
77pub mod rtcctrl;
78#[doc = "32kHz External Crystal Oscillator (XOSC32K) Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xosc32k](xosc32k) module"]
79pub type XOSC32K = crate::Reg<u16, _XOSC32K>;
80#[allow(missing_docs)]
81#[doc(hidden)]
82pub struct _XOSC32K;
83#[doc = "`read()` method returns [xosc32k::R](xosc32k::R) reader structure"]
84impl crate::Readable for XOSC32K {}
85#[doc = "`write(|w| ..)` method takes [xosc32k::W](xosc32k::W) writer structure"]
86impl crate::Writable for XOSC32K {}
87#[doc = "32kHz External Crystal Oscillator (XOSC32K) Control"]
88pub mod xosc32k;
89#[doc = "Clock Failure Detector Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfdctrl](cfdctrl) module"]
90pub type CFDCTRL = crate::Reg<u8, _CFDCTRL>;
91#[allow(missing_docs)]
92#[doc(hidden)]
93pub struct _CFDCTRL;
94#[doc = "`read()` method returns [cfdctrl::R](cfdctrl::R) reader structure"]
95impl crate::Readable for CFDCTRL {}
96#[doc = "`write(|w| ..)` method takes [cfdctrl::W](cfdctrl::W) writer structure"]
97impl crate::Writable for CFDCTRL {}
98#[doc = "Clock Failure Detector Control"]
99pub mod cfdctrl;
100#[doc = "Event Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](evctrl) module"]
101pub type EVCTRL = crate::Reg<u8, _EVCTRL>;
102#[allow(missing_docs)]
103#[doc(hidden)]
104pub struct _EVCTRL;
105#[doc = "`read()` method returns [evctrl::R](evctrl::R) reader structure"]
106impl crate::Readable for EVCTRL {}
107#[doc = "`write(|w| ..)` method takes [evctrl::W](evctrl::W) writer structure"]
108impl crate::Writable for EVCTRL {}
109#[doc = "Event Control"]
110pub mod evctrl;
111#[doc = "32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [osculp32k](osculp32k) module"]
112pub type OSCULP32K = crate::Reg<u32, _OSCULP32K>;
113#[allow(missing_docs)]
114#[doc(hidden)]
115pub struct _OSCULP32K;
116#[doc = "`read()` method returns [osculp32k::R](osculp32k::R) reader structure"]
117impl crate::Readable for OSCULP32K {}
118#[doc = "`write(|w| ..)` method takes [osculp32k::W](osculp32k::W) writer structure"]
119impl crate::Writable for OSCULP32K {}
120#[doc = "32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control"]
121pub mod osculp32k;
atsamd51n20a/osc32kctrl.rs

atsamd51n20a/
osc32kctrl.rs
