atsamd51g19a/tcc0/
cc_dith6_mode.rs1#[doc = "Reader of register CC_DITH6_MODE[%s]"]
2pub type R = crate::R<u32, super::CC_DITH6_MODE>;
3#[doc = "Writer for register CC_DITH6_MODE[%s]"]
4pub type W = crate::W<u32, super::CC_DITH6_MODE>;
5#[doc = "Register CC_DITH6_MODE[%s]
6`reset()`'s with value 0"]
7impl crate::ResetValue for super::CC_DITH6_MODE {
8 type Type = u32;
9 #[inline(always)]
10 fn reset_value() -> Self::Type {
11 0
12 }
13}
14#[doc = "Reader of field `DITHER`"]
15pub type DITHER_R = crate::R<u8, u8>;
16#[doc = "Write proxy for field `DITHER`"]
17pub struct DITHER_W<'a> {
18 w: &'a mut W,
19}
20impl<'a> DITHER_W<'a> {
21 #[doc = r"Writes raw bits to the field"]
22 #[inline(always)]
23 pub unsafe fn bits(self, value: u8) -> &'a mut W {
24 self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
25 self.w
26 }
27}
28#[doc = "Reader of field `CC`"]
29pub type CC_R = crate::R<u32, u32>;
30#[doc = "Write proxy for field `CC`"]
31pub struct CC_W<'a> {
32 w: &'a mut W,
33}
34impl<'a> CC_W<'a> {
35 #[doc = r"Writes raw bits to the field"]
36 #[inline(always)]
37 pub unsafe fn bits(self, value: u32) -> &'a mut W {
38 self.w.bits = (self.w.bits & !(0x0003_ffff << 6)) | (((value as u32) & 0x0003_ffff) << 6);
39 self.w
40 }
41}
42impl R {
43 #[doc = "Bits 0:5 - Dithering Cycle Number"]
44 #[inline(always)]
45 pub fn dither(&self) -> DITHER_R {
46 DITHER_R::new((self.bits & 0x3f) as u8)
47 }
48 #[doc = "Bits 6:23 - Channel Compare/Capture Value"]
49 #[inline(always)]
50 pub fn cc(&self) -> CC_R {
51 CC_R::new(((self.bits >> 6) & 0x0003_ffff) as u32)
52 }
53}
54impl W {
55 #[doc = "Bits 0:5 - Dithering Cycle Number"]
56 #[inline(always)]
57 pub fn dither(&mut self) -> DITHER_W {
58 DITHER_W { w: self }
59 }
60 #[doc = "Bits 6:23 - Channel Compare/Capture Value"]
61 #[inline(always)]
62 pub fn cc(&mut self) -> CC_W {
63 CC_W { w: self }
64 }
65}