atsamd21j18a/adc/
intenset.rs

1#[doc = "Reader of register INTENSET"]
2pub type R = crate::R<u8, super::INTENSET>;
3#[doc = "Writer for register INTENSET"]
4pub type W = crate::W<u8, super::INTENSET>;
5#[doc = "Register INTENSET `reset()`'s with value 0"]
6impl crate::ResetValue for super::INTENSET {
7    type Type = u8;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `RESRDY`"]
14pub type RESRDY_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `RESRDY`"]
16pub struct RESRDY_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RESRDY_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `OVERRUN`"]
38pub type OVERRUN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `OVERRUN`"]
40pub struct OVERRUN_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> OVERRUN_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `WINMON`"]
62pub type WINMON_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `WINMON`"]
64pub struct WINMON_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> WINMON_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "Reader of field `SYNCRDY`"]
86pub type SYNCRDY_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `SYNCRDY`"]
88pub struct SYNCRDY_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> SYNCRDY_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u8) & 0x01) << 3);
106        self.w
107    }
108}
109impl R {
110    #[doc = "Bit 0 - Result Ready Interrupt Enable"]
111    #[inline(always)]
112    pub fn resrdy(&self) -> RESRDY_R {
113        RESRDY_R::new((self.bits & 0x01) != 0)
114    }
115    #[doc = "Bit 1 - Overrun Interrupt Enable"]
116    #[inline(always)]
117    pub fn overrun(&self) -> OVERRUN_R {
118        OVERRUN_R::new(((self.bits >> 1) & 0x01) != 0)
119    }
120    #[doc = "Bit 2 - Window Monitor Interrupt Enable"]
121    #[inline(always)]
122    pub fn winmon(&self) -> WINMON_R {
123        WINMON_R::new(((self.bits >> 2) & 0x01) != 0)
124    }
125    #[doc = "Bit 3 - Synchronization Ready Interrupt Enable"]
126    #[inline(always)]
127    pub fn syncrdy(&self) -> SYNCRDY_R {
128        SYNCRDY_R::new(((self.bits >> 3) & 0x01) != 0)
129    }
130}
131impl W {
132    #[doc = "Bit 0 - Result Ready Interrupt Enable"]
133    #[inline(always)]
134    pub fn resrdy(&mut self) -> RESRDY_W {
135        RESRDY_W { w: self }
136    }
137    #[doc = "Bit 1 - Overrun Interrupt Enable"]
138    #[inline(always)]
139    pub fn overrun(&mut self) -> OVERRUN_W {
140        OVERRUN_W { w: self }
141    }
142    #[doc = "Bit 2 - Window Monitor Interrupt Enable"]
143    #[inline(always)]
144    pub fn winmon(&mut self) -> WINMON_W {
145        WINMON_W { w: self }
146    }
147    #[doc = "Bit 3 - Synchronization Ready Interrupt Enable"]
148    #[inline(always)]
149    pub fn syncrdy(&mut self) -> SYNCRDY_W {
150        SYNCRDY_W { w: self }
151    }
152}
atsamd21j18a/adc/intenset.rs

atsamd21j18a/adc/
intenset.rs
