atsamd21j18a/nvmctrl/
ctrlb.rs

1#[doc = "Reader of register CTRLB"]
2pub type R = crate::R<u32, super::CTRLB>;
3#[doc = "Writer for register CTRLB"]
4pub type W = crate::W<u32, super::CTRLB>;
5#[doc = "Register CTRLB `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRLB {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "NVM Read Wait States\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum RWS_A {
17    #[doc = "0: Single Auto Wait State"]
18    SINGLE = 0,
19    #[doc = "1: Half Auto Wait State"]
20    HALF = 1,
21    #[doc = "2: Dual Auto Wait State"]
22    DUAL = 2,
23}
24impl From<RWS_A> for u8 {
25    #[inline(always)]
26    fn from(variant: RWS_A) -> Self {
27        variant as _
28    }
29}
30#[doc = "Reader of field `RWS`"]
31pub type RWS_R = crate::R<u8, RWS_A>;
32impl RWS_R {
33    #[doc = r"Get enumerated values variant"]
34    #[inline(always)]
35    pub fn variant(&self) -> crate::Variant<u8, RWS_A> {
36        use crate::Variant::*;
37        match self.bits {
38            0 => Val(RWS_A::SINGLE),
39            1 => Val(RWS_A::HALF),
40            2 => Val(RWS_A::DUAL),
41            i => Res(i),
42        }
43    }
44    #[doc = "Checks if the value of the field is `SINGLE`"]
45    #[inline(always)]
46    pub fn is_single(&self) -> bool {
47        *self == RWS_A::SINGLE
48    }
49    #[doc = "Checks if the value of the field is `HALF`"]
50    #[inline(always)]
51    pub fn is_half(&self) -> bool {
52        *self == RWS_A::HALF
53    }
54    #[doc = "Checks if the value of the field is `DUAL`"]
55    #[inline(always)]
56    pub fn is_dual(&self) -> bool {
57        *self == RWS_A::DUAL
58    }
59}
60#[doc = "Write proxy for field `RWS`"]
61pub struct RWS_W<'a> {
62    w: &'a mut W,
63}
64impl<'a> RWS_W<'a> {
65    #[doc = r"Writes `variant` to the field"]
66    #[inline(always)]
67    pub fn variant(self, variant: RWS_A) -> &'a mut W {
68        unsafe { self.bits(variant.into()) }
69    }
70    #[doc = "Single Auto Wait State"]
71    #[inline(always)]
72    pub fn single(self) -> &'a mut W {
73        self.variant(RWS_A::SINGLE)
74    }
75    #[doc = "Half Auto Wait State"]
76    #[inline(always)]
77    pub fn half(self) -> &'a mut W {
78        self.variant(RWS_A::HALF)
79    }
80    #[doc = "Dual Auto Wait State"]
81    #[inline(always)]
82    pub fn dual(self) -> &'a mut W {
83        self.variant(RWS_A::DUAL)
84    }
85    #[doc = r"Writes raw bits to the field"]
86    #[inline(always)]
87    pub unsafe fn bits(self, value: u8) -> &'a mut W {
88        self.w.bits = (self.w.bits & !(0x0f << 1)) | (((value as u32) & 0x0f) << 1);
89        self.w
90    }
91}
92#[doc = "Reader of field `MANW`"]
93pub type MANW_R = crate::R<bool, bool>;
94#[doc = "Write proxy for field `MANW`"]
95pub struct MANW_W<'a> {
96    w: &'a mut W,
97}
98impl<'a> MANW_W<'a> {
99    #[doc = r"Sets the field bit"]
100    #[inline(always)]
101    pub fn set_bit(self) -> &'a mut W {
102        self.bit(true)
103    }
104    #[doc = r"Clears the field bit"]
105    #[inline(always)]
106    pub fn clear_bit(self) -> &'a mut W {
107        self.bit(false)
108    }
109    #[doc = r"Writes raw bits to the field"]
110    #[inline(always)]
111    pub fn bit(self, value: bool) -> &'a mut W {
112        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
113        self.w
114    }
115}
116#[doc = "Power Reduction Mode during Sleep\n\nValue on reset: 0"]
117#[derive(Clone, Copy, Debug, PartialEq)]
118#[repr(u8)]
119pub enum SLEEPPRM_A {
120    #[doc = "0: NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
121    WAKEONACCESS = 0,
122    #[doc = "1: NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
123    WAKEUPINSTANT = 1,
124    #[doc = "3: Auto power reduction disabled."]
125    DISABLED = 3,
126}
127impl From<SLEEPPRM_A> for u8 {
128    #[inline(always)]
129    fn from(variant: SLEEPPRM_A) -> Self {
130        variant as _
131    }
132}
133#[doc = "Reader of field `SLEEPPRM`"]
134pub type SLEEPPRM_R = crate::R<u8, SLEEPPRM_A>;
135impl SLEEPPRM_R {
136    #[doc = r"Get enumerated values variant"]
137    #[inline(always)]
138    pub fn variant(&self) -> crate::Variant<u8, SLEEPPRM_A> {
139        use crate::Variant::*;
140        match self.bits {
141            0 => Val(SLEEPPRM_A::WAKEONACCESS),
142            1 => Val(SLEEPPRM_A::WAKEUPINSTANT),
143            3 => Val(SLEEPPRM_A::DISABLED),
144            i => Res(i),
145        }
146    }
147    #[doc = "Checks if the value of the field is `WAKEONACCESS`"]
148    #[inline(always)]
149    pub fn is_wakeonaccess(&self) -> bool {
150        *self == SLEEPPRM_A::WAKEONACCESS
151    }
152    #[doc = "Checks if the value of the field is `WAKEUPINSTANT`"]
153    #[inline(always)]
154    pub fn is_wakeupinstant(&self) -> bool {
155        *self == SLEEPPRM_A::WAKEUPINSTANT
156    }
157    #[doc = "Checks if the value of the field is `DISABLED`"]
158    #[inline(always)]
159    pub fn is_disabled(&self) -> bool {
160        *self == SLEEPPRM_A::DISABLED
161    }
162}
163#[doc = "Write proxy for field `SLEEPPRM`"]
164pub struct SLEEPPRM_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> SLEEPPRM_W<'a> {
168    #[doc = r"Writes `variant` to the field"]
169    #[inline(always)]
170    pub fn variant(self, variant: SLEEPPRM_A) -> &'a mut W {
171        unsafe { self.bits(variant.into()) }
172    }
173    #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
174    #[inline(always)]
175    pub fn wakeonaccess(self) -> &'a mut W {
176        self.variant(SLEEPPRM_A::WAKEONACCESS)
177    }
178    #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
179    #[inline(always)]
180    pub fn wakeupinstant(self) -> &'a mut W {
181        self.variant(SLEEPPRM_A::WAKEUPINSTANT)
182    }
183    #[doc = "Auto power reduction disabled."]
184    #[inline(always)]
185    pub fn disabled(self) -> &'a mut W {
186        self.variant(SLEEPPRM_A::DISABLED)
187    }
188    #[doc = r"Writes raw bits to the field"]
189    #[inline(always)]
190    pub unsafe fn bits(self, value: u8) -> &'a mut W {
191        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
192        self.w
193    }
194}
195#[doc = "NVMCTRL Read Mode\n\nValue on reset: 0"]
196#[derive(Clone, Copy, Debug, PartialEq)]
197#[repr(u8)]
198pub enum READMODE_A {
199    #[doc = "0: The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
200    NO_MISS_PENALTY = 0,
201    #[doc = "1: Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
202    LOW_POWER = 1,
203    #[doc = "2: The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
204    DETERMINISTIC = 2,
205}
206impl From<READMODE_A> for u8 {
207    #[inline(always)]
208    fn from(variant: READMODE_A) -> Self {
209        variant as _
210    }
211}
212#[doc = "Reader of field `READMODE`"]
213pub type READMODE_R = crate::R<u8, READMODE_A>;
214impl READMODE_R {
215    #[doc = r"Get enumerated values variant"]
216    #[inline(always)]
217    pub fn variant(&self) -> crate::Variant<u8, READMODE_A> {
218        use crate::Variant::*;
219        match self.bits {
220            0 => Val(READMODE_A::NO_MISS_PENALTY),
221            1 => Val(READMODE_A::LOW_POWER),
222            2 => Val(READMODE_A::DETERMINISTIC),
223            i => Res(i),
224        }
225    }
226    #[doc = "Checks if the value of the field is `NO_MISS_PENALTY`"]
227    #[inline(always)]
228    pub fn is_no_miss_penalty(&self) -> bool {
229        *self == READMODE_A::NO_MISS_PENALTY
230    }
231    #[doc = "Checks if the value of the field is `LOW_POWER`"]
232    #[inline(always)]
233    pub fn is_low_power(&self) -> bool {
234        *self == READMODE_A::LOW_POWER
235    }
236    #[doc = "Checks if the value of the field is `DETERMINISTIC`"]
237    #[inline(always)]
238    pub fn is_deterministic(&self) -> bool {
239        *self == READMODE_A::DETERMINISTIC
240    }
241}
242#[doc = "Write proxy for field `READMODE`"]
243pub struct READMODE_W<'a> {
244    w: &'a mut W,
245}
246impl<'a> READMODE_W<'a> {
247    #[doc = r"Writes `variant` to the field"]
248    #[inline(always)]
249    pub fn variant(self, variant: READMODE_A) -> &'a mut W {
250        unsafe { self.bits(variant.into()) }
251    }
252    #[doc = "The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
253    #[inline(always)]
254    pub fn no_miss_penalty(self) -> &'a mut W {
255        self.variant(READMODE_A::NO_MISS_PENALTY)
256    }
257    #[doc = "Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
258    #[inline(always)]
259    pub fn low_power(self) -> &'a mut W {
260        self.variant(READMODE_A::LOW_POWER)
261    }
262    #[doc = "The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
263    #[inline(always)]
264    pub fn deterministic(self) -> &'a mut W {
265        self.variant(READMODE_A::DETERMINISTIC)
266    }
267    #[doc = r"Writes raw bits to the field"]
268    #[inline(always)]
269    pub unsafe fn bits(self, value: u8) -> &'a mut W {
270        self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
271        self.w
272    }
273}
274#[doc = "Reader of field `CACHEDIS`"]
275pub type CACHEDIS_R = crate::R<bool, bool>;
276#[doc = "Write proxy for field `CACHEDIS`"]
277pub struct CACHEDIS_W<'a> {
278    w: &'a mut W,
279}
280impl<'a> CACHEDIS_W<'a> {
281    #[doc = r"Sets the field bit"]
282    #[inline(always)]
283    pub fn set_bit(self) -> &'a mut W {
284        self.bit(true)
285    }
286    #[doc = r"Clears the field bit"]
287    #[inline(always)]
288    pub fn clear_bit(self) -> &'a mut W {
289        self.bit(false)
290    }
291    #[doc = r"Writes raw bits to the field"]
292    #[inline(always)]
293    pub fn bit(self, value: bool) -> &'a mut W {
294        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
295        self.w
296    }
297}
298impl R {
299    #[doc = "Bits 1:4 - NVM Read Wait States"]
300    #[inline(always)]
301    pub fn rws(&self) -> RWS_R {
302        RWS_R::new(((self.bits >> 1) & 0x0f) as u8)
303    }
304    #[doc = "Bit 7 - Manual Write"]
305    #[inline(always)]
306    pub fn manw(&self) -> MANW_R {
307        MANW_R::new(((self.bits >> 7) & 0x01) != 0)
308    }
309    #[doc = "Bits 8:9 - Power Reduction Mode during Sleep"]
310    #[inline(always)]
311    pub fn sleepprm(&self) -> SLEEPPRM_R {
312        SLEEPPRM_R::new(((self.bits >> 8) & 0x03) as u8)
313    }
314    #[doc = "Bits 16:17 - NVMCTRL Read Mode"]
315    #[inline(always)]
316    pub fn readmode(&self) -> READMODE_R {
317        READMODE_R::new(((self.bits >> 16) & 0x03) as u8)
318    }
319    #[doc = "Bit 18 - Cache Disable"]
320    #[inline(always)]
321    pub fn cachedis(&self) -> CACHEDIS_R {
322        CACHEDIS_R::new(((self.bits >> 18) & 0x01) != 0)
323    }
324}
325impl W {
326    #[doc = "Bits 1:4 - NVM Read Wait States"]
327    #[inline(always)]
328    pub fn rws(&mut self) -> RWS_W {
329        RWS_W { w: self }
330    }
331    #[doc = "Bit 7 - Manual Write"]
332    #[inline(always)]
333    pub fn manw(&mut self) -> MANW_W {
334        MANW_W { w: self }
335    }
336    #[doc = "Bits 8:9 - Power Reduction Mode during Sleep"]
337    #[inline(always)]
338    pub fn sleepprm(&mut self) -> SLEEPPRM_W {
339        SLEEPPRM_W { w: self }
340    }
341    #[doc = "Bits 16:17 - NVMCTRL Read Mode"]
342    #[inline(always)]
343    pub fn readmode(&mut self) -> READMODE_W {
344        READMODE_W { w: self }
345    }
346    #[doc = "Bit 18 - Cache Disable"]
347    #[inline(always)]
348    pub fn cachedis(&mut self) -> CACHEDIS_W {
349        CACHEDIS_W { w: self }
350    }
351}
atsamd21j18a/nvmctrl/ctrlb.rs

atsamd21j18a/nvmctrl/
ctrlb.rs
