atsamd21j18a/pm/
sleep.rs

1#[doc = "Reader of register SLEEP"]
2pub type R = crate::R<u8, super::SLEEP>;
3#[doc = "Writer for register SLEEP"]
4pub type W = crate::W<u8, super::SLEEP>;
5#[doc = "Register SLEEP `reset()`'s with value 0"]
6impl crate::ResetValue for super::SLEEP {
7    type Type = u8;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Idle Mode Configuration\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum IDLE_A {
17    #[doc = "0: The CPU clock domain is stopped"]
18    CPU = 0,
19    #[doc = "1: The CPU and AHB clock domains are stopped"]
20    AHB = 1,
21    #[doc = "2: The CPU, AHB and APB clock domains are stopped"]
22    APB = 2,
23}
24impl From<IDLE_A> for u8 {
25    #[inline(always)]
26    fn from(variant: IDLE_A) -> Self {
27        variant as _
28    }
29}
30#[doc = "Reader of field `IDLE`"]
31pub type IDLE_R = crate::R<u8, IDLE_A>;
32impl IDLE_R {
33    #[doc = r"Get enumerated values variant"]
34    #[inline(always)]
35    pub fn variant(&self) -> crate::Variant<u8, IDLE_A> {
36        use crate::Variant::*;
37        match self.bits {
38            0 => Val(IDLE_A::CPU),
39            1 => Val(IDLE_A::AHB),
40            2 => Val(IDLE_A::APB),
41            i => Res(i),
42        }
43    }
44    #[doc = "Checks if the value of the field is `CPU`"]
45    #[inline(always)]
46    pub fn is_cpu(&self) -> bool {
47        *self == IDLE_A::CPU
48    }
49    #[doc = "Checks if the value of the field is `AHB`"]
50    #[inline(always)]
51    pub fn is_ahb(&self) -> bool {
52        *self == IDLE_A::AHB
53    }
54    #[doc = "Checks if the value of the field is `APB`"]
55    #[inline(always)]
56    pub fn is_apb(&self) -> bool {
57        *self == IDLE_A::APB
58    }
59}
60#[doc = "Write proxy for field `IDLE`"]
61pub struct IDLE_W<'a> {
62    w: &'a mut W,
63}
64impl<'a> IDLE_W<'a> {
65    #[doc = r"Writes `variant` to the field"]
66    #[inline(always)]
67    pub fn variant(self, variant: IDLE_A) -> &'a mut W {
68        unsafe { self.bits(variant.into()) }
69    }
70    #[doc = "The CPU clock domain is stopped"]
71    #[inline(always)]
72    pub fn cpu(self) -> &'a mut W {
73        self.variant(IDLE_A::CPU)
74    }
75    #[doc = "The CPU and AHB clock domains are stopped"]
76    #[inline(always)]
77    pub fn ahb(self) -> &'a mut W {
78        self.variant(IDLE_A::AHB)
79    }
80    #[doc = "The CPU, AHB and APB clock domains are stopped"]
81    #[inline(always)]
82    pub fn apb(self) -> &'a mut W {
83        self.variant(IDLE_A::APB)
84    }
85    #[doc = r"Writes raw bits to the field"]
86    #[inline(always)]
87    pub unsafe fn bits(self, value: u8) -> &'a mut W {
88        self.w.bits = (self.w.bits & !0x03) | ((value as u8) & 0x03);
89        self.w
90    }
91}
92impl R {
93    #[doc = "Bits 0:1 - Idle Mode Configuration"]
94    #[inline(always)]
95    pub fn idle(&self) -> IDLE_R {
96        IDLE_R::new((self.bits & 0x03) as u8)
97    }
98}
99impl W {
100    #[doc = "Bits 0:1 - Idle Mode Configuration"]
101    #[inline(always)]
102    pub fn idle(&mut self) -> IDLE_W {
103        IDLE_W { w: self }
104    }
105}
atsamd21j18a/pm/sleep.rs

atsamd21j18a/pm/
sleep.rs
